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authorLey Foon Tan <ley.foon.tan@intel.com>2019-06-13 16:17:23 +0800
committerMarek Vasut <marex@denx.de>2019-06-14 12:41:26 +0200
commitb861cfb53c58e06513c3d4518a0d4e5ca57ec2ee (patch)
tree311df221d595a243a7af4cd8eb5e57acb8fdc85d /arch/arm
parentc2ea87883ef309570c8903e6de4b8b78685d73d0 (diff)
arm: dts: Stratix10: Enable i2c
Enable i2c1 in Stratix 10 devkit. SOCFPGA_STRATIX10 # i2c bus Bus 0: i2c@ffc02900 SOCFPGA_STRATIX10 # i2c dev 0 Setting bus to 0 SOCFPGA_STRATIX10 # i2c probe Valid chip addresses: 14 4C 51 68 74 Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm')
-rwxr-xr-xarch/arm/dts/socfpga_stratix10_socdk.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts
index 2745050810..c5409df026 100755
--- a/arch/arm/dts/socfpga_stratix10_socdk.dts
+++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
@@ -9,6 +9,7 @@
model = "SoCFPGA Stratix 10 SoCDK";
aliases {
+ i2c0 = &i2c1;
serial0 = &uart0;
};
@@ -77,6 +78,10 @@
};
};
+&i2c1 {
+ status = "okay";
+};
+
&mmc {
status = "okay";
cap-sd-highspeed;