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authorYuichiro Goto <goto.yuichiro@espark.co.jp>2016-02-25 10:23:34 +0900
committerTom Rini <trini@konsulko.com>2016-02-29 14:49:35 -0500
commitba10b852fe3a5d6188dfa43cced4bfbaf3515df1 (patch)
treecbc70ad9067f80250c5c700e4b7d6330fec67061 /arch/arm
parenta15221e0800e2ea2b5d39a033c9538e7a30f3a52 (diff)
ARM: start.S: fix typo
Fix typo in comment about position of 'A' bit in several start.S. Signed-off-by: Yuichiro Goto <goto.yuichiro@espark.co.jp>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/arm1136/start.S2
-rw-r--r--arch/arm/cpu/arm1176/start.S2
-rw-r--r--arch/arm/cpu/arm920t/start.S2
-rw-r--r--arch/arm/cpu/arm926ejs/start.S2
-rw-r--r--arch/arm/cpu/arm946es/start.S2
-rw-r--r--arch/arm/cpu/pxa/start.S2
-rw-r--r--arch/arm/cpu/sa1100/start.S2
7 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 1ec79a6f35..3ebdfddc80 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -78,7 +78,7 @@ cpu_init_crit:
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
+ orr r0, r0, #0x00000002 @ set bit 1 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 4c0ab4d0ee..a602d4e693 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -78,7 +78,7 @@ cpu_init_crit:
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
+ orr r0, r0, #0x00000002 @ set bit 1 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
/* Prepare to disable the MMU */
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 07404502c8..69cabebed9 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -131,7 +131,7 @@ cpu_init_crit:
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
+ orr r0, r0, #0x00000002 @ set bit 1 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 82cc1c9477..f05113da9d 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -95,7 +95,7 @@ flush_dcache:
#else
bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */
#endif
- orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
+ orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
#ifndef CONFIG_SYS_ICACHE_OFF
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
#endif
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index b55395aa53..214cd8cbd9 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -86,7 +86,7 @@ cpu_init_crit:
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
- orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
+ orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
mcr p15, 0, r0, c1, c0, 0
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 879390be2d..24b6ad187a 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -100,7 +100,7 @@ cpu_init_crit:
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00003300 @ clear bits 13:12, 9:8 (--VI --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
+ orr r0, r0, #0x00000002 @ set bit 1 (A) Align
mcr p15, 0, r0, c1, c0, 0
mov pc, lr /* back to my caller */
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index eebff661f8..408b70dbc1 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -112,7 +112,7 @@ cpu_init_crit:
bic r0, r0, #0x00002000 @ clear bit 13 (X)
bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM)
orr r0, r0, #0x00001000 @ set bit 12 (I) Icache
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
+ orr r0, r0, #0x00000002 @ set bit 1 (A) Align
mcr p15,0,r0,c1,c0
/*