diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2015-01-23 09:45:12 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2015-01-26 08:55:31 +0100 |
| commit | c08cfc2d2cf43c443f74549aefd7a7f2ffc3d7de (patch) | |
| tree | 2fec9bd4072ee64f9238b317d1741b58a4d8c16a /arch/arm | |
| parent | 92fa7f53f1f3f03296f8ffb14bdf1baefab83368 (diff) | |
ARM: zynq: Enable the Neon instructions
Added the lowlevel_init to enable the Neon instructions.
Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.
Also enable neon instructions for non-xilinx toolchain.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/config.mk | 7 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/cpu.c | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/lowlevel_init.S | 26 |
4 files changed, 34 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/zynq/Makefile b/arch/arm/cpu/armv7/zynq/Makefile index 3363a3c71b..901f2ce4cb 100644 --- a/arch/arm/cpu/armv7/zynq/Makefile +++ b/arch/arm/cpu/armv7/zynq/Makefile @@ -13,4 +13,5 @@ obj-y += cpu.o obj-y += ddrc.o obj-y += slcr.o obj-y += clk.o +obj-y += lowlevel_init.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/arm/cpu/armv7/zynq/config.mk b/arch/arm/cpu/armv7/zynq/config.mk new file mode 100644 index 0000000000..778a377e8a --- /dev/null +++ b/arch/arm/cpu/armv7/zynq/config.mk @@ -0,0 +1,7 @@ +# +# Copyright (C) 2013 - 2015 Xilinx, Inc. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0 +# +# Allow NEON instructions (needed for lowlevel_init.S with GNU toolchain) +PLATFORM_RELFLAGS += -mfpu=neon diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c index 816d0c5da7..d1bfec9f71 100644 --- a/arch/arm/cpu/armv7/zynq/cpu.c +++ b/arch/arm/cpu/armv7/zynq/cpu.c @@ -10,9 +10,6 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/hardware.h> -void lowlevel_init(void) -{ -} #define ZYNQ_SILICON_VER_MASK 0xF0000000 #define ZYNQ_SILICON_VER_SHIFT 28 diff --git a/arch/arm/cpu/armv7/zynq/lowlevel_init.S b/arch/arm/cpu/armv7/zynq/lowlevel_init.S new file mode 100644 index 0000000000..6d714b711c --- /dev/null +++ b/arch/arm/cpu/armv7/zynq/lowlevel_init.S @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2013 Xilinx, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <linux/linkage.h> + +ENTRY(lowlevel_init) + + /* Enable the the VFP */ + mrc p15, 0, r1, c1, c0, 2 + orr r1, r1, #(0x3 << 20) + orr r1, r1, #(0x3 << 20) + mcr p15, 0, r1, c1, c0, 2 + isb + fmrx r1, FPEXC + orr r1,r1, #(1<<30) + fmxr FPEXC, r1 + + /* Move back to caller */ + mov pc, lr + +ENDPROC(lowlevel_init) |