diff options
| author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2018-09-11 15:09:56 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-11-26 10:50:54 +0100 |
| commit | c25e804dd852bc316b6c4dee53c9b2211d247468 (patch) | |
| tree | 76abac37f16e9c707283fa886eeb7144bf066666 /arch/arm | |
| parent | 5473f245d0a884ffd1a7f353b86d5d11e01d3ebd (diff) | |
arm: zynq: cse_qspi: Fix overwriting spi-rx-bus-width property
spi-rx-bus-width property is part of flash, so it should be moved
to flash node from qspi node. This patch fixes the incorrect read
of spi-rx-bus-width property by moving it to flash node.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/zynq-cse-qspi-single.dts | 2 | ||||
| -rw-r--r-- | arch/arm/dts/zynq-cse-qspi.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/zynq-cse-qspi-single.dts b/arch/arm/dts/zynq-cse-qspi-single.dts index 3252d6a444..0d680dfc06 100644 --- a/arch/arm/dts/zynq-cse-qspi-single.dts +++ b/arch/arm/dts/zynq-cse-qspi-single.dts @@ -7,6 +7,6 @@ #include "zynq-cse-qspi.dtsi" -&qspi { +&flash0 { spi-rx-bus-width = <4>; }; diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index 2b169468b0..65af4081ff 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -59,7 +59,7 @@ #address-cells = <1>; #size-cells = <0>; num-cs = <1>; - flash@0 { + flash0: flash@0 { compatible = "n25q128a11"; reg = <0x0>; spi-tx-bus-width = <1>; |