diff options
| author | Dai Okamura <okamura.dai@socionext.com> | 2017-12-06 14:16:32 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-12-12 00:36:11 +0900 |
| commit | c30c44e799e1f7d5184c487809edbd612705ba5c (patch) | |
| tree | 211962f11fa2e3f0793123c8a802584c55fcf7e8 /arch/arm | |
| parent | dc774e69bb72a3d8ff4c2af7a280a655f395530b (diff) | |
ARM: uniphier: fix SSCPLL init code for LD11 SoC
Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC")
missed to write the computed value to the SSCPLLCTRL2 register.
Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC")
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-uniphier/clk/pll-base-ld20.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c index 3aa42f8bfd..45fdf0a322 100644 --- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c +++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c @@ -48,6 +48,7 @@ int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq, tmp = readl(base + 4); tmp &= ~SC_PLLCTRL2_SSC_JK_MASK; tmp |= (41859 * freq / divn) & SC_PLLCTRL2_SSC_JK_MASK; + writel(tmp, base + 4); udelay(50); } |