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authorLokesh Vutla <lokeshvutla@ti.com>2016-03-05 17:32:28 +0530
committerTom Rini <trini@konsulko.com>2016-03-14 19:18:46 -0400
commitde095474788d6731f71bf4ce2187d047e0e8ee9b (patch)
treec7c66eb039b476233060544a96509a0bd6491847 /arch/arm
parent871ca263ab5d25c904f33f50fe76ee63f5e541b6 (diff)
ARM: DRA7: emif: Fix updating of refresh ctrl shadow
On DRA7, refresh ctrl shadow should be updated with the final value. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/omap-common/emif-common.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c
index bf7bf262c7..90c241a007 100644
--- a/arch/arm/cpu/armv7/omap-common/emif-common.c
+++ b/arch/arm/cpu/armv7/omap-common/emif-common.c
@@ -163,7 +163,11 @@ void emif_update_timings(u32 base, const struct emif_regs *regs)
{
struct emif_reg_struct *emif = (struct emif_reg_struct *)base;
- writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl_shdw);
+ if (!is_dra7xx())
+ writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl_shdw);
+ else
+ writel(regs->ref_ctrl_final, &emif->emif_sdram_ref_ctrl_shdw);
+
writel(regs->sdram_tim1, &emif->emif_sdram_tim_1_shdw);
writel(regs->sdram_tim2, &emif->emif_sdram_tim_2_shdw);
writel(regs->sdram_tim3, &emif->emif_sdram_tim_3_shdw);