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authorBin Meng <bmeng.cn@gmail.com>2015-06-23 12:18:47 +0800
committerSimon Glass <sjg@chromium.org>2015-07-14 18:03:17 -0600
commitdf81749db7d7303508be41503e4c8d1229a07d4c (patch)
tree8043e6019215094cdb0d822ad26a9d4b594c1a28 /arch/blackfin/include/asm/gpio.h
parent8c38e4d0b8d37dcd3bfd2293481e220b1b4a3a42 (diff)
x86: Reduce PIRQ routing table size
There is no need to populate multiple irq info entries with the same bus number and device number, but with different interrupt pin. We can use the same entry to store all the 4 interrupt pin (INT A/B/C/D) routing information to reduce the whole PIRQ routing table size. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/blackfin/include/asm/gpio.h')
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