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authorMichal Simek <michal.simek@xilinx.com>2016-02-15 13:44:19 +0100
committerMichal Simek <michal.simek@xilinx.com>2016-04-04 20:28:38 +0200
commita359eaa59857079678a2fa5ff0e4c0894de4ee1d (patch)
treec415ca3eeec7f53920342b898647608c372dc32b /arch/microblaze/cpu/timer.c
parent9aa65cab73e4873f3e94c6df3d0efd99f3bc9926 (diff)
microblaze: Remove !OF_CONTROL code for timer and interrupt
OF_CONTROL is enabled by default that's why this is dead code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/microblaze/cpu/timer.c')
-rw-r--r--arch/microblaze/cpu/timer.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c
index c0fc7c0f3c..8845e07d0e 100644
--- a/arch/microblaze/cpu/timer.c
+++ b/arch/microblaze/cpu/timer.c
@@ -31,11 +31,6 @@ void __udelay(unsigned long usec)
i = get_timer(0);
while ((get_timer(0) - i) < (usec / 1000))
;
- } else {
-#ifndef CONFIG_OF_CONTROL
- for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++)
- ;
-#endif
}
}
@@ -51,8 +46,6 @@ int timer_init (void)
int irq = -1;
u32 preload = 0;
u32 ret = 0;
-
-#ifdef CONFIG_OF_CONTROL
const void *blob = gd->fdt_blob;
int node = 0;
u32 cell[2];
@@ -83,13 +76,6 @@ int timer_init (void)
return node;
}
-#else
-#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
- preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
- irq = CONFIG_SYS_TIMER_0_IRQ;
- tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
-#endif
-#endif
if (tmr && preload && irq >= 0) {
tmr->loadreg = preload;
tmr->control = TIMER_INTERRUPT | TIMER_RESET;