diff options
author | Zhi-zhou Zhang <etou.zh@gmail.com> | 2012-10-16 15:02:08 +0200 |
---|---|---|
committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2012-10-16 15:02:08 +0200 |
commit | cb0a6a1ecc8dfe4dbdad6f9376ef78879337b118 (patch) | |
tree | 6398daa7ee7188509950120a9377bfa91e9c478c /arch/mips/cpu/mips32/cpu.c | |
parent | bd23b22badadcdc414a900828253961fc5ec6c39 (diff) |
MIPS: don't use camel-case style
Replace camel-case style with upper-case style globally.
Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
Diffstat (limited to 'arch/mips/cpu/mips32/cpu.c')
-rw-r--r-- | arch/mips/cpu/mips32/cpu.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/cpu/mips32/cpu.c b/arch/mips/cpu/mips32/cpu.c index 7b49e1b612..50bb248bd0 100644 --- a/arch/mips/cpu/mips32/cpu.c +++ b/arch/mips/cpu/mips32/cpu.c @@ -61,8 +61,8 @@ void flush_cache(ulong start_addr, ulong size) return; while (1) { - cache_op(Hit_Writeback_Inv_D, addr); - cache_op(Hit_Invalidate_I, addr); + cache_op(HIT_WRITEBACK_INV_D, addr); + cache_op(HIT_INVALIDATE_I, addr); if (addr == aend) break; addr += lsize; @@ -76,7 +76,7 @@ void flush_dcache_range(ulong start_addr, ulong stop) unsigned long aend = (stop - 1) & ~(lsize - 1); while (1) { - cache_op(Hit_Writeback_Inv_D, addr); + cache_op(HIT_WRITEBACK_INV_D, addr); if (addr == aend) break; addr += lsize; @@ -90,7 +90,7 @@ void invalidate_dcache_range(ulong start_addr, ulong stop) unsigned long aend = (stop - 1) & ~(lsize - 1); while (1) { - cache_op(Hit_Invalidate_D, addr); + cache_op(HIT_INVALIDATE_D, addr); if (addr == aend) break; addr += lsize; |