Merge branch 'master' of git://git.denx.de/u-boot-arm

4 files changed, 67 insertions, 40 deletions

diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk
index 1536746c97..cf5fa6ab6b 100644
--- a/arch/mips/cpu/xburst/config.mk
+++ b/arch/mips/cpu/xburst/config.mk
@@ -21,5 +21,11 @@
 #
 
 PLATFORM_CPPFLAGS += -march=mips32
+PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
+ifdef CONFIG_SYS_BIG_ENDIAN
+PLATFORM_LDFLAGS  += -m elf32btsmip
+else
+PLATFORM_LDFLAGS  += -m elf32ltsmip
+endif
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
index c0b9817ab9..b2d8f4d20d 100644
--- a/arch/mips/cpu/xburst/jz4740.c
+++ b/arch/mips/cpu/xburst/jz4740.c
@@ -201,10 +201,10 @@ void calc_clocks(void)
 	pllout = __cpm_get_pllout();
 
 	gd->cpu_clk = pllout / div[__cpm_get_cdiv()];
-	gd->sys_clk = pllout / div[__cpm_get_hdiv()];
-	gd->per_clk = pllout / div[__cpm_get_pdiv()];
+	gd->arch.sys_clk = pllout / div[__cpm_get_hdiv()];
+	gd->arch.per_clk = pllout / div[__cpm_get_pdiv()];
 	gd->mem_clk = pllout / div[__cpm_get_mdiv()];
-	gd->dev_clk = CONFIG_SYS_EXTAL;
+	gd->arch.dev_clk = CONFIG_SYS_EXTAL;
 }
 
 void rtc_init(void)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S
index 3a8280cb0a..d2c064b017 100644
--- a/arch/mips/cpu/xburst/start.S
+++ b/arch/mips/cpu/xburst/start.S
@@ -64,19 +64,13 @@ relocate_code:
 	move	sp, a0			# set new stack pointer
 
 	li	t0, CONFIG_SYS_MONITOR_BASE
+	sub	t6, a2, t0		# t6 <-- relocation offset
+
 	la	t3, in_ram
-	lw	t2, -12(t3)		# t2 <-- uboot_end_data
+	lw	t2, -12(t3)		# t2 <-- __image_copy_end
 	move	t1, a2
 
-	/*
-	 * Fix $gp:
-	 *
-	 * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
-	 */
-	move	t6, gp
-	sub	gp, CONFIG_SYS_MONITOR_BASE
-	add	gp, a2			# gp now adjusted
-	sub	t6, gp, t6		# t6 <-- relocation offset
+	add	gp, t6			# adjust gp
 
 	/*
 	 * t0 = source address
@@ -87,7 +81,7 @@ relocate_code:
 	lw	t3, 0(t0)
 	sw	t3, 0(t1)
 	addu	t0, 4
-	ble	t0, t2, 1b
+	blt	t0, t2, 1b
 	 addu	t1, 4
 
 	/* If caches were enabled, we would have to flush them here. */
@@ -122,10 +116,10 @@ relocate_code:
 	jr	t0
 	 nop
 
-	.word	_gp
+	.word	__rel_dyn_end
+	.word	__rel_dyn_start
+	.word	__image_copy_end
 	.word	_GLOBAL_OFFSET_TABLE_
-	.word	uboot_end_data
-	.word	uboot_end
 	.word	num_got_entries
 
 in_ram:
@@ -136,10 +130,8 @@ in_ram:
 	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	lw	t3, -4(t0)		# t3 <-- num_got_entries
-	lw	t4, -16(t0)		# t4 <-- _GLOBAL_OFFSET_TABLE_
-	lw	t5, -20(t0)		# t5 <-- _gp
-	sub	t4, t5			# compute offset
-	add	t4, t4, gp		# t4 now holds relocated _G_O_T_
+	lw	t4, -8(t0)		# t4 <-- _GLOBAL_OFFSET_TABLE_
+	add	t4, t6			# t4 now holds relocated _G_O_T_
 	addi	t4, t4, 8		# skipping first two entries
 	li	t2, 2
 1:
@@ -152,16 +144,45 @@ in_ram:
 	blt	t2, t3, 1b
 	 addi	t4, 4
 
-	/* Clear BSS */
-	lw	t1, -12(t0)		# t1 <-- uboot_end_data
-	lw	t2, -8(t0)		# t2 <-- uboot_end
-	add	t1, t6			# adjust pointers
-	add	t2, t6
+	/* Update dynamic relocations */
+	lw	t1, -16(t0)		# t1 <-- __rel_dyn_start
+	lw	t2, -20(t0)		# t2 <-- __rel_dyn_end
+
+	b	2f			# skip first reserved entry
+	 addi	t1, 8
+
+1:
+	lw	t3, -4(t1)		# t3 <-- relocation info
+
+	sub	t3, 3
+	bnez	t3, 2f			# skip non R_MIPS_REL32 entries
+	 nop
+
+	lw	t3, -8(t1)		# t3 <-- location to fix up in FLASH
+
+	lw	t4, 0(t3)		# t4 <-- original pointer
+	add	t4, t6			# t4 <-- adjusted pointer
+
+	add	t3, t6			# t3 <-- location to fix up in RAM
+	sw	t4, 0(t3)
+
+2:
+	blt	t1, t2, 1b
+	 addi	t1, 8			# each rel.dyn entry is 8 bytes
+
+	/*
+	 * Clear BSS
+	 *
+	 * GOT is now relocated. Thus __bss_start and __bss_end can be
+	 * accessed directly via $gp.
+	 */
+	la	t1, __bss_start		# t1 <-- __bss_start
+	la	t2, __bss_end		# t2 <-- __bss_end
 
-	sub	t1, 4
-1:	addi	t1, 4
-	bltl	t1, t2, 1b
-	 sw	zero, 0(t1)
+1:
+	sw	zero, 0(t1)
+	blt	t1, t2, 1b
+	 addi	t1, 4
 
 	move	a0, a1			# a0 <-- gd
 	la	t9, board_init_r
diff --git a/arch/mips/cpu/xburst/timer.c b/arch/mips/cpu/xburst/timer.c
index b6b3855ea1..8c33d3ca3c 100644
--- a/arch/mips/cpu/xburst/timer.c
+++ b/arch/mips/cpu/xburst/timer.c
@@ -34,24 +34,24 @@ static struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE;
 void reset_timer_masked(void)
 {
 	/* reset time */
-	gd->lastinc = readl(&tcu->tcnt0);
-	gd->tbl = 0;
+	gd->arch.lastinc = readl(&tcu->tcnt0);
+	gd->arch.tbl = 0;
 }
 
 ulong get_timer_masked(void)
 {
 	ulong now = readl(&tcu->tcnt0);
 
-	if (gd->lastinc <= now)
-		gd->tbl += now - gd->lastinc; /* normal mode */
+	if (gd->arch.lastinc <= now)
+		gd->arch.tbl += now - gd->arch.lastinc; /* normal mode */
 	else {
 		/* we have an overflow ... */
-		gd->tbl += TIMER_FDATA + now - gd->lastinc;
+		gd->arch.tbl += TIMER_FDATA + now - gd->arch.lastinc;
 	}
 
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 void udelay_masked(unsigned long usec)
@@ -94,8 +94,8 @@ int timer_init(void)
 	writel(1 << TIMER_CHAN, &tcu->tscr); /* enable timer clock */
 	writeb(1 << TIMER_CHAN, &tcu->tesr); /* start counting up */
 
-	gd->lastinc = 0;
-	gd->tbl = 0;
+	gd->arch.lastinc = 0;
+	gd->arch.tbl = 0;
 
 	return 0;
 }
@@ -112,7 +112,7 @@ ulong get_timer(ulong base)
 
 void set_timer(ulong t)
 {
-	gd->tbl = t;
+	gd->arch.tbl = t;
 }
 
 void __udelay(unsigned long usec)