diff options
| author | Horatiu Vultur <horatiu.vultur@microchip.com> | 2019-01-12 18:56:56 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2019-01-16 13:56:43 +0100 |
| commit | e7a0de2c317e75accfa53c2dd17f521462ccd830 (patch) | |
| tree | e8d0631ccc08defd2fe66f32262ed3a9f17446da /arch/mips/mach-mscc/cpu.c | |
| parent | 051de9b3eb445107b497dd9d92382f8cfa2781a1 (diff) | |
MSCC: Add support for Jaguar2 SOC family
As the Ocelot and Luton SoCs, this family of SoCs are found
in Microsemi Switches solution.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Diffstat (limited to 'arch/mips/mach-mscc/cpu.c')
| -rw-r--r-- | arch/mips/mach-mscc/cpu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/mach-mscc/cpu.c b/arch/mips/mach-mscc/cpu.c index 5be8ff69d5..4729b7aede 100644 --- a/arch/mips/mach-mscc/cpu.c +++ b/arch/mips/mach-mscc/cpu.c @@ -87,8 +87,15 @@ int mach_cpu_init(void) ICPU_SPI_MST_CFG_CS_DESELECT_TIME(0x19) + ICPU_SPI_MST_CFG_CLK_DIV(9), BASE_CFG + ICPU_SPI_MST_CFG); #else +#ifdef CONFIG_SOC_OCELOT writel(ICPU_SPI_MST_CFG_CS_DESELECT_TIME(0x19) + ICPU_SPI_MST_CFG_CLK_DIV(9), BASE_CFG + ICPU_SPI_MST_CFG); +#endif +#ifdef CONFIG_SOC_JR2 + writel(ICPU_SPI_MST_CFG_FAST_READ_ENA + + ICPU_SPI_MST_CFG_CS_DESELECT_TIME(0x19) + + ICPU_SPI_MST_CFG_CLK_DIV(14), BASE_CFG + ICPU_SPI_MST_CFG); +#endif /* * Legacy and mainline linux kernel expect that the * interruption map was set as it was done by redboot. |