diff options
| author | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-12-14 16:16:48 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-12-19 15:23:01 +0100 |
| commit | 6bd8231a6dd58c2003e67a84e55705014d963989 (patch) | |
| tree | 73a1600debc1d5d272a39d2d3d8dd8ecd882ca69 /arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h | |
| parent | dd1033e4e0254bd2d19debe433921d9a71bdf674 (diff) | |
MSCC: add support for Luton SoCs
As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h')
| -rw-r--r-- | arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h new file mode 100644 index 0000000000..8c0b612325 --- /dev/null +++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2018 Microsemi Corporation + */ + +#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_ +#define _MSCC_OCELOT_DEVCPU_GCB_H_ + +#define PERF_SOFT_RST 0x90 + +#define PERF_SOFT_RST_SOFT_SWC_RST BIT(1) +#define PERF_SOFT_RST_SOFT_CHIP_RST BIT(0) + +#endif |