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| author | Tom Rini <trini@konsulko.com> | 2019-05-24 08:13:27 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-24 08:13:27 -0400 |
| commit | 866a78dc28411f4c76ba887f439f69f1116d8a6b (patch) | |
| tree | e9e7f1255f290783c4f748983debbf832495764e /arch/mips | |
| parent | afe9e1f197e6d0ee4fa59d56639ca56d5f2ed566 (diff) | |
| parent | 187c41d783371dc3b7ecae45f450b330f5e1bb25 (diff) | |
Merge tag 'u-boot-stm32-20190523' of https://github.com/pchotard/u-boot
- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions