diff options
| author | Chris Packham <judge.packham@gmail.com> | 2018-10-04 20:03:53 +1300 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2018-10-29 13:13:05 -0700 |
| commit | 4eaf7f525a0874a1eff0f5666004896cc5c89fa3 (patch) | |
| tree | 551c1b5d786f0f8fc0182361ad98f591c6a71481 /arch/powerpc/cpu/mpc85xx/Kconfig | |
| parent | 454cf76184c65426b68033a23da086e73663f2fc (diff) | |
fsl/usb: Workaround for USB erratum-A005275
Workaround makes FS as default mode on all affected socs.
Add support to check erratum-A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for the errata
Force FS mode as default by:
- making EPS as FS
- setting PFSC bit to disable HS chirping
This workaround can be disabled by mentioning "no_erratum_a005275" in
hwconfig string
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/Kconfig')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 7d139fffa2..309ca29460 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -659,6 +659,7 @@ config ARCH_P1010 select SYS_FSL_ERRATUM_A004477 select SYS_FSL_ERRATUM_A004508 select SYS_FSL_ERRATUM_A005125 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_A007075 select SYS_FSL_ERRATUM_ESDHC111 @@ -821,6 +822,7 @@ config ARCH_P2041 select FSL_LAW select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_CPU_A003999 select SYS_FSL_ERRATUM_DDR_A003 @@ -845,6 +847,7 @@ config ARCH_P3041 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004849 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A005812 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_CPU_A003999 @@ -910,6 +913,7 @@ config ARCH_P5020 select FSL_LAW select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_DDR_A003 select SYS_FSL_ERRATUM_DDR_A003474 @@ -935,6 +939,7 @@ config ARCH_P5040 select SYS_FSL_DDR_VER_44 select SYS_FSL_ERRATUM_A004510 select SYS_FSL_ERRATUM_A004699 + select SYS_FSL_ERRATUM_A005275 select SYS_FSL_ERRATUM_A005812 select SYS_FSL_ERRATUM_A006261 select SYS_FSL_ERRATUM_DDR_A003 @@ -1303,6 +1308,9 @@ config SYS_FSL_ERRATUM_A005812 config SYS_FSL_ERRATUM_A005871 bool +config SYS_FSL_ERRATUM_A005275 + bool + config SYS_FSL_ERRATUM_A006261 bool |