diff options
| author | York Sun <yorksun@freescale.com> | 2013-03-25 07:40:06 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-24 16:54:11 -0500 |
| commit | 5f208d118a8590843aaca723d304b35f2729c141 (patch) | |
| tree | 84d1df85a082c43f729c6b8e12b86747c923d10d /arch/powerpc/cpu/mpc85xx/Makefile | |
| parent | 3d2972feac4383f5c0f929996976d00f9c072339 (diff) | |
powerpc/mpc8xxx: Add T1040 and variant SoCs
T1040 and variants have e5500 cores and are compliant to QorIQ Chassis
Generation 2. The major difference between T1040 and its variants is the
number of cores and the number of L2 switch ports.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/Makefile')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/Makefile | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 6e5aec26e0..2318064a47 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -88,6 +88,7 @@ COBJS-$(CONFIG_PPC_B4420) += ddr-gen3.o COBJS-$(CONFIG_PPC_B4860) += ddr-gen3.o COBJS-$(CONFIG_BSC9131) += ddr-gen3.o COBJS-$(CONFIG_BSC9132) += ddr-gen3.o +COBJS-$(CONFIG_PPC_T1040) += ddr-gen3.o COBJS-$(CONFIG_CPM2) += ether_fcc.o COBJS-$(CONFIG_OF_LIBFDT) += fdt.o @@ -106,6 +107,7 @@ COBJS-$(CONFIG_PPC_T4240) += t4240_ids.o COBJS-$(CONFIG_PPC_T4160) += t4240_ids.o COBJS-$(CONFIG_PPC_B4420) += b4860_ids.o COBJS-$(CONFIG_PPC_B4860) += b4860_ids.o +COBJS-$(CONFIG_PPC_T1040) += t1040_ids.o COBJS-$(CONFIG_QE) += qe_io.o COBJS-$(CONFIG_CPM2) += serial_scc.o @@ -143,6 +145,7 @@ COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o +COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o COBJS-y += cpu.o COBJS-y += cpu_init.o |