diff options
| author | York Sun <yorksun@freescale.com> | 2014-05-23 13:15:00 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-06-05 13:45:07 -0700 |
| commit | 9855b3beca648dabe4d86b06d36bf219ebd0732d (patch) | |
| tree | c0a02085628640beec9e0d69f31af84f00eabb8e /arch/powerpc/cpu/mpc85xx/cmd_errata.c | |
| parent | aaee5230f135bbfbe7abe6388cd04931f322db68 (diff) | |
powerpc/mpc85xx: Add workaround for DDR erratum A004508
When the DDR controller is initialized below a junction temperature of
0°C and then operated above a junction temperature of 65°C, the DDR
controller may cause receive data errors, resulting ECC errors and/or
corrupted data. This erratum applies to the following SoCs and their
variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023,
P2020.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cmd_errata.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 3d37a7614f..f69c834897 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -231,6 +231,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) puts("Work-around for Erratum NMG ETSEC129 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A004508 + puts("Work-around for Erratum A004508 enabled\n"); +#endif #ifdef CONFIG_SYS_FSL_ERRATUM_A004510 puts("Work-around for Erratum A004510 enabled\n"); #endif |