diff options
| author | Ruchika Gupta <ruchika.gupta@freescale.com> | 2014-09-09 11:50:31 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-10-16 14:16:50 -0700 |
| commit | 028dbb8db1d18c5835ab34659f9ef7a516571524 (patch) | |
| tree | b6c94157e8a8483a025b2ec4591df115422fe3ae /arch/powerpc/cpu/mpc85xx/cpu_init.c | |
| parent | 48ef0d2a1002d3da0bf7ed13d0959bcbf782c792 (diff) | |
fsl_sec : Change accessor function to take care of endianness
SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.
So update acessor functions with common SEC acessor functions to take care
both type of endianness.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 5bfab70b7e..bf9fbbf1da 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -803,7 +803,7 @@ int cpu_init_r(void) #ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571 #define MCFGR_AXIPIPE 0x000000f0 if (IS_SVR_REV(svr, 1, 0)) - clrbits_be32(&sec->mcfgr, MCFGR_AXIPIPE); + sec_clrbits32(&sec->mcfgr, MCFGR_AXIPIPE); #endif #ifdef CONFIG_SYS_FSL_ERRATUM_A005871 |