diff options
author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2013-01-23 19:56:23 +0000 |
---|---|---|
committer | Andy Fleming <afleming@freescale.com> | 2013-01-30 11:25:15 -0600 |
commit | 72bd83cd0a12f411983d33b5f24adc16b9b77313 (patch) | |
tree | bc5e93af719bb3f197fd7d770beee9f8afa4a198 /arch/powerpc/cpu/mpc85xx/cpu_init.c | |
parent | 5e95e2d84bdab9fef309392e51fd4b68a6a28949 (diff) |
powerpc/t4240: Adding workaround errata A-005871
When CoreNet Fabric (CCF) internal resources are consumed by the cores,
inbound SRIO messaging traffic through RMan can put the device into a
deadlock condition.
This errata workaround forces internal resources to be reserved for
upstream transactions. This ensures resources exist on the device for
upstream transactions and removes the deadlock condition.
The Workaround is for the T4240 silicon rev 1.0.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init.c')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index cc0930002c..de9d916111 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -548,6 +548,20 @@ skip_l2: /* needs to be in ram since code uses global static vars */ fsl_serdes_init(); +#ifdef CONFIG_SYS_FSL_ERRATUM_A005871 + if (IS_SVR_REV(svr, 1, 0)) { + int i; + __be32 *p = (void __iomem *)CONFIG_SYS_DCSRBAR + 0xb004c; + + for (i = 0; i < 12; i++) { + p += i + (i > 5 ? 11 : 0); + out_be32(p, 0x2); + } + p = (void __iomem *)CONFIG_SYS_DCSRBAR + 0xb0108; + out_be32(p, 0x34); + } +#endif + #ifdef CONFIG_SYS_SRIO srio_init(); #ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER |