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authorYork Sun <yorksun@freescale.com>2012-07-06 17:10:33 -0500
committerAndy Fleming <afleming@freescale.com>2012-07-06 17:30:33 -0500
commit48f6a5c348453fc3ab33aaa91e5e4198a28678ff (patch)
treef1adc995cec4ced7d867de36230f1aa600c4d216 /arch/powerpc/cpu/mpc85xx/fdt.c
parent1e9ea85f7dffe949ca5e4845e6336810c144e06d (diff)
powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER()
We don't care E bit of SVR in most cases. Clear E bit for SVR_SOC_VER(). This will simplify the coding. Use IS_E_PROCESSOR() to identify SoC with encryption. Remove all _E entries from SVR list and CPU list. Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/fdt.c')
-rw-r--r--arch/powerpc/cpu/mpc85xx/fdt.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 977770e99d..21c3ad49bf 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -139,16 +139,14 @@ static inline u32 l2cache_size(void)
break;
case 0x1:
if (ver == SVR_8540 || ver == SVR_8560 ||
- ver == SVR_8541 || ver == SVR_8541_E ||
- ver == SVR_8555 || ver == SVR_8555_E)
+ ver == SVR_8541 || ver == SVR_8555)
return 128;
else
return 256;
break;
case 0x2:
if (ver == SVR_8540 || ver == SVR_8560 ||
- ver == SVR_8541 || ver == SVR_8541_E ||
- ver == SVR_8555 || ver == SVR_8555_E)
+ ver == SVR_8541 || ver == SVR_8555)
return 256;
else
return 512;
@@ -231,8 +229,7 @@ static inline void ft_fixup_l2cache(void *blob)
int has_l2 = 1;
/* P2040/P2040E has no L2, so dont set any L2 props */
- if ((SVR_SOC_VER(get_svr()) == SVR_P2040) ||
- (SVR_SOC_VER(get_svr()) == SVR_P2040_E))
+ if (SVR_SOC_VER(get_svr()) == SVR_P2040)
has_l2 = 0;
size = (l2cfg0 & 0x3fff) * 64 * 1024;
@@ -407,7 +404,7 @@ static void ft_fixup_qe_snum(void *blob)
unsigned int svr;
svr = mfspr(SPRN_SVR);
- if (SVR_SOC_VER(svr) == SVR_8569_E) {
+ if (SVR_SOC_VER(svr) == SVR_8569) {
if(IS_SVR_REV(svr, 1, 0))
do_fixup_by_compat_u32(blob, "fsl,qe",
"fsl,qe-num-snums", 46, 1);