diff options
| author | Tom Rini <trini@konsulko.com> | 2019-11-11 14:19:04 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-11-11 14:19:04 -0500 |
| commit | 0b73ef0c02313e651af4b0a8e206c7c4a198e7f8 (patch) | |
| tree | 6e84ad48ccdb4b02b3a272ec30e7967426c15e13 /arch/powerpc/cpu/mpc85xx/start.S | |
| parent | a4b7485e2f311b1319b1b9cd59f5666536e24a28 (diff) | |
| parent | bef18454044e62800ece687b8d50ddd853117660 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC.
- Few bug fixes and updates related to SPI, hwconfig, ethernet,
fsl-layerscape, pci, icid, PSCI
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/start.S')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index dbc705388c..38e907f5ad 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -33,7 +33,7 @@ #endif #if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && \ - !defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) + !defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define NOR_BOOT #endif @@ -123,7 +123,7 @@ _start_e500: #endif -#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \ +#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_E500MC) && \ !defined(CONFIG_E6500) /* ISBC uses L2 as stack. * Disable L2 cache here so that u-boot can enable it later @@ -467,7 +467,7 @@ nexti: mflr r1 /* R1 = our PC */ blt 1b #if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL) && \ - !defined(CONFIG_SECURE_BOOT) + !defined(CONFIG_NXP_ESBC) /* * TLB entry for debuggging in AS1 * Create temporary TLB entry in AS0 to handle debug exception @@ -1065,7 +1065,7 @@ create_init_ram_area: 0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 -#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT) +#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC) /* create a temp mapping in AS = 1 for Flash mapping * created by PBL for ISBC code */ @@ -1080,7 +1080,7 @@ create_init_ram_area: * and for targets with CONFIG_SPL like T1, T2, T4, only for * u-boot-spl i.e. CONFIG_SPL_BUILD */ -#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_SECURE_BOOT) && \ +#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_NXP_ESBC) && \ (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) /* create a temp mapping in AS = 1 for mapping CONFIG_SYS_MONITOR_BASE * to L3 Address configured by PBL for ISBC code |