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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2015-12-16 16:45:41 +0800
committerYork Sun <york.sun@nxp.com>2016-01-25 08:24:15 -0800
commita994b3deb00bf3177cdf9f92060baec4f640f466 (patch)
treee7e7a70b20a26ab4d63ff55ea91b867343a03b23 /arch/powerpc/cpu/mpc85xx
parent6f14e257c472c895499c186b602861e90f2656b5 (diff)
driver/ddr/fsl: Add workaround for A009663
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0 before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE] to the desired value after DDR initialization has completed. When DDR controller is configured to operate in auto-precharge mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
-rw-r--r--arch/powerpc/cpu/mpc85xx/cmd_errata.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index a4935567f6..3b06ae42e4 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -326,6 +326,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#if defined(CONFIG_SYS_FSL_B4860QDS_XFI_ERR) && defined(CONFIG_B4860QDS)
puts("Work-around for Erratum XFI on B4860QDS enabled\n");
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009663
+ puts("Work-around for Erratum A009663 enabled\n");
+#endif
return 0;
}