diff options
| author | York Sun <yorksun@freescale.com> | 2013-06-25 11:37:43 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-08-09 12:41:38 -0700 |
| commit | f165bc35285460f9739a234de379a535519f39e6 (patch) | |
| tree | eaf5957f7e71ed011bed3c490e393723b7b6b5d4 /arch/powerpc/cpu/mpc85xx | |
| parent | bc4804516e9fc75eea59b2d32a6b1de79f6fea6d (diff) | |
powerpc/corenet: Move RCW print to cpu.c
The RCW print is common for all corenet platforms. Not necessary to ducplicate
in each board file.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu.c | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 91ac4ee617..66bc6a2ea3 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -44,10 +44,10 @@ int checkcpu (void) uint major, minor; struct cpu_type *cpu; char buf1[32], buf2[32]; -#if (defined(CONFIG_DDR_CLK_FREQ) || \ - defined(CONFIG_FSL_CORENET)) && !defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -#endif /* CONFIG_FSL_CORENET */ +#if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET) + ccsr_gur_t __iomem *gur = + (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); +#endif /* * Cornet platforms use ddr sync bit in RCW to indicate sync vs async @@ -211,6 +211,21 @@ int checkcpu (void) puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n"); +#ifdef CONFIG_FSL_CORENET + /* Display the RCW, so that no one gets confused as to what RCW + * we're actually using for this boot. + */ + puts("Reset Configuration Word (RCW):"); + for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) { + u32 rcw = in_be32(&gur->rcwsr[i]); + + if ((i % 4) == 0) + printf("\n %08x:", i * 4); + printf(" %08x", rcw); + } + puts("\n"); +#endif + return 0; } |