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authorYork Sun <yorksun@freescale.com>2012-10-08 07:44:25 +0000
committerAndy Fleming <afleming@freescale.com>2012-10-22 14:31:28 -0500
commiteb5394120643922626f18e5fe7b0b3dc0ed43b9a (patch)
tree968121a3577cf3c8e14bd435d9c8c303140f3cd1 /arch/powerpc/cpu/mpc86xx/mp.c
parentf31cfd19253713eea59311dec9e99df5d43b2db9 (diff)
powerpc/mpc85xx: software workaround for DDR erratum A-004468
Boot space translation utilizes the pre-translation address to select the DDR controller target. However, the post-translation address will be presented to the selected DDR controller. It is possible that the pre- translation address selects one DDR controller but the post-translation address exists in a different DDR controller when using certain DDR controller interleaving modes. The device may fail to boot under these circumstances. Note that a DDR MSE error will not be detected since DDR controller bounds registers are programmed to be the same when configured for DDR controller interleaving. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc86xx/mp.c')
-rw-r--r--arch/powerpc/cpu/mpc86xx/mp.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c
index 30c99ebc56..de705f0ae8 100644
--- a/arch/powerpc/cpu/mpc86xx/mp.c
+++ b/arch/powerpc/cpu/mpc86xx/mp.c
@@ -90,8 +90,11 @@ int cpu_release(int nr, int argc, char * const argv[])
return 1;
}
-u32 determine_mp_bootpg(void)
+u32 determine_mp_bootpg(unsigned int *pagesize)
{
+ if (pagesize)
+ *pagesize = 4096;
+
/* if we have 4G or more of memory, put the boot page at 4Gb-1M */
if ((u64)gd->ram_size > 0xfffff000)
return (0xfff00000);
@@ -101,7 +104,7 @@ u32 determine_mp_bootpg(void)
void cpu_mp_lmb_reserve(struct lmb *lmb)
{
- u32 bootpg = determine_mp_bootpg();
+ u32 bootpg = determine_mp_bootpg(NULL);
/* tell u-boot we stole a page */
lmb_reserve(lmb, bootpg, 4096);
@@ -115,7 +118,7 @@ void setup_mp(void)
{
extern ulong __secondary_start_page;
ulong fixup = (ulong)&__secondary_start_page;
- u32 bootpg = determine_mp_bootpg();
+ u32 bootpg = determine_mp_bootpg(NULL);
u32 bootpg_va;
if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) {