diff options
| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-06-20 13:54:55 +0900 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-07-07 19:43:02 -0400 |
| commit | 03f9d7d1749fddf147823549e6965f6fb13faad6 (patch) | |
| tree | 15336e8865592f5428f9473175308eee9e9f4005 /arch/powerpc/cpu/mpc8xx/fec.c | |
| parent | c51c1c9af95ff4fa365024e4d815576e818c51aa (diff) | |
mpc8xx: remove fads board support
These boards are old enough and have no maintainers.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xx/fec.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xx/fec.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c index ccb460ef96..d12b3df4a1 100644 --- a/arch/powerpc/cpu/mpc8xx/fec.c +++ b/arch/powerpc/cpu/mpc8xx/fec.c @@ -542,32 +542,6 @@ static int fec_init (struct eth_device *dev, bd_t * bd) (volatile fec_t *) (CONFIG_SYS_IMMR + efis->fecp_offset); int i; - if (efis->ether_index == 0) { -#if defined(CONFIG_FADS) /* FADS family uses FPGA (BCSR) to control PHYs */ -#if defined(CONFIG_MPC885ADS) - *(vu_char *) BCSR5 &= ~(BCSR5_MII1_EN | BCSR5_MII1_RST); -#else - /* configure FADS for fast (FEC) ethernet, half-duplex */ - /* The LXT970 needs about 50ms to recover from reset, so - * wait for it by discovering the PHY before leaving eth_init(). - */ - { - volatile uint *bcsr4 = (volatile uint *) BCSR4; - - *bcsr4 = (*bcsr4 & ~(BCSR4_FETH_EN | BCSR4_FETHCFG1)) - | (BCSR4_FETHCFG0 | BCSR4_FETHFDE | - BCSR4_FETHRST); - - /* reset the LXT970 PHY */ - *bcsr4 &= ~BCSR4_FETHRST; - udelay (10); - *bcsr4 |= BCSR4_FETHRST; - udelay (10); - } -#endif /* CONFIG_MPC885ADS */ -#endif /* CONFIG_FADS */ - } - #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) /* the MII interface is connected to FEC1 * so for the miiphy_xxx function to work we must |