summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu/mpc8xx
diff options
context:
space:
mode:
authorStefano Babic <sbabic@denx.de>2014-07-16 08:51:30 +0200
committerStefano Babic <sbabic@denx.de>2014-07-16 08:51:30 +0200
commitdab5e3469d294a4e1ffed8407d296a78e02cc01f (patch)
treec6378034591210b3142ca3add806d52c6ea22b3b /arch/powerpc/cpu/mpc8xx
parent14a1613140519a8d0a88e6054c302a8cb3e067a5 (diff)
parent524123a70761110c5cf3ccc5f52f6d4da071b959 (diff)
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de> Conflicts: boards.cfg
Diffstat (limited to 'arch/powerpc/cpu/mpc8xx')
-rw-r--r--arch/powerpc/cpu/mpc8xx/cpu.c8
-rw-r--r--arch/powerpc/cpu/mpc8xx/cpu_init.c6
-rw-r--r--arch/powerpc/cpu/mpc8xx/fec.c46
-rw-r--r--arch/powerpc/cpu/mpc8xx/scc.c34
-rw-r--r--arch/powerpc/cpu/mpc8xx/serial.c14
-rw-r--r--arch/powerpc/cpu/mpc8xx/video.c48
6 files changed, 2 insertions, 154 deletions
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 5c96b5fe16..eb4432f6d7 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -97,14 +97,8 @@ static int check_CPU (long clock, uint pvr, uint immr)
pre = 'M'; m = 1;
if (id_str == NULL)
id_str =
-# if defined(CONFIG_MPC852T)
- "PC852T";
-# elif defined(CONFIG_MPC859T)
+# if defined(CONFIG_MPC859T)
"PC859T";
-# elif defined(CONFIG_MPC859DSL)
- "PC859DSL";
-# elif defined(CONFIG_MPC866T)
- "PC866T";
# else
"PC866x"; /* Unknown chip from MPC866 family */
# endif
diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index 9c3102dc69..e51fec7260 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -138,8 +138,6 @@ void cpu_init_f (volatile immap_t * immr)
defined(CONFIG_MHPC) || \
defined(CONFIG_R360MPI) || \
defined(CONFIG_RMU) || \
- defined(CONFIG_RPXLITE) || \
- defined(CONFIG_SPC1920) || \
defined(CONFIG_SPD823TS)
memctl->memc_br0 = CONFIG_SYS_BR0_PRELIM;
@@ -206,10 +204,6 @@ void cpu_init_f (volatile immap_t * immr)
__asm__ ("eieio");
} while (immr->im_cpm.cp_cpcr & CPM_CR_FLG);
-#if defined(CONFIG_RPXLITE) && defined(CONFIG_ENV_IS_IN_NVRAM)
- rpxlite_init ();
-#endif
-
#ifdef CONFIG_SYS_RCCR /* must be done before cpm_load_patch() */
/* write config value */
immr->im_cpm.cp_rccr = CONFIG_SYS_RCCR;
diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index 65dfeabba4..d12b3df4a1 100644
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -377,26 +377,6 @@ static void fec_pin_init(int fecidx)
*/
immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
-#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
- {
- volatile fec_t *fecp;
-
- /*
- * only two FECs please
- */
- if ((unsigned int)fecidx >= 2)
- hang();
-
- if (fecidx == 0)
- fecp = &immr->im_cpm.cp_fec1;
- else
- fecp = &immr->im_cpm.cp_fec2;
-
- /* our PHYs are the limit at 2.5 MHz */
- fecp->fec_mii_speed <<= 1;
- }
-#endif
-
#if defined(CONFIG_MPC885_FAMILY) && defined(WANT_MII)
/* use MDC for MII */
immr->im_ioport.iop_pdpar |= 0x0080;
@@ -562,32 +542,6 @@ static int fec_init (struct eth_device *dev, bd_t * bd)
(volatile fec_t *) (CONFIG_SYS_IMMR + efis->fecp_offset);
int i;
- if (efis->ether_index == 0) {
-#if defined(CONFIG_FADS) /* FADS family uses FPGA (BCSR) to control PHYs */
-#if defined(CONFIG_MPC885ADS)
- *(vu_char *) BCSR5 &= ~(BCSR5_MII1_EN | BCSR5_MII1_RST);
-#else
- /* configure FADS for fast (FEC) ethernet, half-duplex */
- /* The LXT970 needs about 50ms to recover from reset, so
- * wait for it by discovering the PHY before leaving eth_init().
- */
- {
- volatile uint *bcsr4 = (volatile uint *) BCSR4;
-
- *bcsr4 = (*bcsr4 & ~(BCSR4_FETH_EN | BCSR4_FETHCFG1))
- | (BCSR4_FETHCFG0 | BCSR4_FETHFDE |
- BCSR4_FETHRST);
-
- /* reset the LXT970 PHY */
- *bcsr4 &= ~BCSR4_FETHRST;
- udelay (10);
- *bcsr4 |= BCSR4_FETHRST;
- udelay (10);
- }
-#endif /* CONFIG_MPC885ADS */
-#endif /* CONFIG_FADS */
- }
-
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/* the MII interface is connected to FEC1
* so for the miiphy_xxx function to work we must
diff --git a/arch/powerpc/cpu/mpc8xx/scc.c b/arch/powerpc/cpu/mpc8xx/scc.c
index 5da697366d..01029ff68a 100644
--- a/arch/powerpc/cpu/mpc8xx/scc.c
+++ b/arch/powerpc/cpu/mpc8xx/scc.c
@@ -197,19 +197,6 @@ static int scc_init (struct eth_device *dev, bd_t * bis)
reset_phy();
#endif
-#ifdef CONFIG_FADS
-#if defined(CONFIG_MPC86xADS) || defined(CONFIG_MPC860T)
- /* The MPC86xADS/FADS860T don't use the MODEM_EN or DATA_VOICE signals. */
- *((uint *) BCSR4) &= ~BCSR4_ETHLOOP;
- *((uint *) BCSR4) |= BCSR4_TFPLDL | BCSR4_TPSQEL;
- *((uint *) BCSR1) &= ~BCSR1_ETHEN;
-#else
- *((uint *) BCSR4) &= ~(BCSR4_ETHLOOP | BCSR4_MODEM_EN);
- *((uint *) BCSR4) |= BCSR4_TFPLDL | BCSR4_TPSQEL | BCSR4_DATA_VOICE;
- *((uint *) BCSR1) &= ~BCSR1_ETHEN;
-#endif
-#endif
-
pram_ptr = (scc_enet_t *) & (immr->im_cpm.cp_dparam[PROFF_ENET]);
rxIdx = 0;
@@ -461,20 +448,6 @@ static int scc_init (struct eth_device *dev, bd_t * bis)
#error Configuration Error: exactly ONE of PB_ENET_TENA, PC_ENET_TENA must be defined
#endif
-#ifdef CONFIG_RPXLITE
- *((uchar *) BCSR0) |= BCSR0_ETHEN;
-#endif
-
-#if defined(CONFIG_QS860T)
- /*
- * PB27=FDE-, set output low for full duplex
- * PB26=Link Test Enable, normally high output
- */
- immr->im_cpm.cp_pbdir |= 0x00000030;
- immr->im_cpm.cp_pbdat |= 0x00000020;
- immr->im_cpm.cp_pbdat &= ~0x00000010;
-#endif /* QS860T */
-
#if defined(CONFIG_NETVIA)
#if defined(PA_ENET_PDN)
immr->im_ioport.iop_papar &= ~PA_ENET_PDN;
@@ -502,13 +475,6 @@ static int scc_init (struct eth_device *dev, bd_t * bis)
immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl |=
(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- /*
- * Work around transmit problem with first eth packet
- */
-#if defined (CONFIG_FADS)
- udelay (10000); /* wait 10 ms */
-#endif
-
return 1;
}
diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c
index 932141144c..b1625fba16 100644
--- a/arch/powerpc/cpu/mpc8xx/serial.c
+++ b/arch/powerpc/cpu/mpc8xx/serial.c
@@ -173,20 +173,6 @@ static int smc_init (void)
# endif
#endif
-#if defined(CONFIG_FADS)
- /* Enable RS232 */
-#if defined(CONFIG_8xx_CONS_SMC1)
- *((uint *) BCSR1) &= ~BCSR1_RS232EN_1;
-#else
- *((uint *) BCSR1) &= ~BCSR1_RS232EN_2;
-#endif
-#endif /* CONFIG_FADS */
-
-#if defined(CONFIG_RPXLITE)
- /* Enable Monitor Port Transceiver */
- *((uchar *) BCSR0) |= BCSR0_ENMONXCVR ;
-#endif /* CONFIG_RPXLITE */
-
/* Set the physical address of the host memory buffers in
* the buffer descriptors.
*/
diff --git a/arch/powerpc/cpu/mpc8xx/video.c b/arch/powerpc/cpu/mpc8xx/video.c
index fc351585be..2fd5b11fe4 100644
--- a/arch/powerpc/cpu/mpc8xx/video.c
+++ b/arch/powerpc/cpu/mpc8xx/video.c
@@ -798,22 +798,6 @@ static void video_encoder_init (void)
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
-#ifdef CONFIG_FADS
- /* Reset ADV7176 chip */
- debug ("[VIDEO ENCODER] Resetting encoder...\n");
- (*(int *) BCSR4) &= ~(1 << 21);
-
- /* Wait for 5 ms inside the reset */
- debug ("[VIDEO ENCODER] Waiting for encoder reset...\n");
- udelay (5000);
-
- /* Take ADV7176 out of reset */
- (*(int *) BCSR4) |= 1 << 21;
-
- /* Wait for 5 ms after the reset */
- udelay (5000);
-#endif /* CONFIG_FADS */
-
/* Send configuration */
#ifdef DEBUG
{
@@ -860,16 +844,6 @@ static void video_ctrl_init (void *memptr)
debug ("[VIDEO CTRL] Turning off video controller...\n");
SETBIT (immap->im_vid.vid_vccr, VIDEO_VCCR_VON, 0);
-#ifdef CONFIG_FADS
- /* Turn on Video Port LED */
- debug ("[VIDEO CTRL] Turning off video port led...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_VIDLED_BIT, 1);
-
- /* Disable internal clock */
- debug ("[VIDEO CTRL] Disabling internal clock...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_EXTCLK_BIT, 0);
-#endif
-
/* Generate and make active a new video mode */
debug ("[VIDEO CTRL] Generating video mode...\n");
video_mode_generate ();
@@ -892,15 +866,6 @@ static void video_ctrl_init (void *memptr)
immap->im_ioport.iop_pdpar = 0x1fff;
immap->im_ioport.iop_pddir = 0x0000;
-#ifdef CONFIG_FADS
- /* Turn on Video Port Clock - ONLY AFTER SET VCCR TO ENABLE EXTERNAL CLOCK */
- debug ("[VIDEO CTRL] Turning on video clock...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_EXTCLK_BIT, 1);
-
- /* Turn on Video Port LED */
- debug ("[VIDEO CTRL] Turning on video port led...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_VIDLED_BIT, 0);
-#endif
#ifdef CONFIG_RRVISION
debug ("PC5->Output(1): enable PAL clock");
immap->im_ioport.iop_pcpar &= ~(0x0400);
@@ -1153,9 +1118,7 @@ static void *video_logo (void)
{
u16 *screen = video_fb_address, width = VIDEO_COLS;
#ifdef VIDEO_INFO
-# ifndef CONFIG_FADS
char temp[32];
-# endif
char info[80];
#endif /* VIDEO_INFO */
@@ -1173,7 +1136,7 @@ static void *video_logo (void)
sprintf (info, " Wolfgang DENK, wd@denx.de");
video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 2,
info);
-#ifndef CONFIG_FADS /* all normal boards */
+
/* leave one blank line */
sprintf(info, "MPC823 CPU at %s MHz, %ld MiB RAM, %ld MiB Flash",
@@ -1182,15 +1145,6 @@ static void *video_logo (void)
gd->bd->bi_flashsize >> 20 );
video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 4,
info);
-#else /* FADS :-( */
- sprintf (info, "MPC823 CPU at 50 MHz on FADS823 board");
- video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT,
- info);
-
- sprintf(info, "2MiB FLASH - 8MiB DRAM - 4MiB SRAM");
- video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 2,
- info);
-#endif
#endif
return video_fb_address + VIDEO_LOGO_HEIGHT * VIDEO_LINE_LEN;