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authorYork Sun <yorksun@freescale.com>2011-06-07 09:42:16 +0800
committerKumar Gala <galak@kernel.crashing.org>2011-07-11 13:24:20 -0500
commit1b3e3c4f263ff20b95c3514eefbde47e950c39e0 (patch)
tree4043fc4d718f49dee1a2d88daa1b9ef87b435980 /arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
parentaeb6716a12c68644d6dc1e798b724086c3cfcd24 (diff)
powerpc/mpc8xxx: Enable calculation for fixed DDR chips
We used to have fixed parameters for soldered DDR chips. This patch introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing data from DDR chip datasheet, implemneted in board-specific files or header files. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/ddr.h')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/ddr.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h b/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
index 1e866fe035..f59aa33b22 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
@@ -14,6 +14,7 @@
#include "common_timing_params.h"
+#if defined(CONFIG_DDR_SPD) || defined(CONFIG_SPD_EEPROM)
/*
* Bind the main DDR setup driver's generic names
* to this specific DDR technology.
@@ -25,6 +26,7 @@ compute_dimm_parameters(const generic_spd_eeprom_t *spd,
{
return ddr_compute_dimm_parameters(spd, pdimm, dimm_number);
}
+#endif
/*
* Data Structures
@@ -80,4 +82,9 @@ extern void check_interleaving_options(fsl_ddr_info_t *pinfo);
extern unsigned int mclk_to_picos(unsigned int mclk);
extern unsigned int get_memory_clk_period_ps(void);
extern unsigned int picos_to_mclk(unsigned int picos);
+
+/* board specific function */
+int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
+ unsigned int controller_number,
+ unsigned int dimm_number);
#endif