diff options
| author | York Sun <yorksun@freescale.com> | 2011-05-27 07:25:51 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-07-11 13:24:20 -0500 |
| commit | 51d498f17517c541e262ad14b043095dea6d0fe7 (patch) | |
| tree | 37fbbad6c68bc7b176663c4ff15b1b8619749590 /arch/powerpc/cpu/mpc8xxx/ddr/main.c | |
| parent | d2246549c7a71a3fca240e78bbcda6951195cfe3 (diff) | |
powerpc/mpc8xxx: Add 16-bit support for DDR3
Add support for 16-bit DDR bus. Also deal with system using 64- and 32-bit
DDR devices.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/main.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/main.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c index c8fa123539..62a73ddf4c 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c @@ -174,7 +174,19 @@ int step_assign_addresses(fsl_ddr_info_t *pinfo, switch (pinfo->memctl_opts[i].data_bus_width) { case 2: /* 16-bit */ - printf("can't handle 16-bit mode yet\n"); + for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { + unsigned int dw; + if (!pinfo->dimm_params[i][j].n_ranks) + continue; + dw = pinfo->dimm_params[i][j].primary_sdram_width; + if ((dw == 72 || dw == 64)) { + dbw_cap_adj[i] = 2; + break; + } else if ((dw == 40 || dw == 32)) { + dbw_cap_adj[i] = 1; + break; + } + } break; case 1: |