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authorWolfgang Denk <wd@denx.de>2011-12-01 23:58:11 +0100
committerWolfgang Denk <wd@denx.de>2011-12-01 23:58:11 +0100
commitd51e6d6de2b7dcba43fadcae2c89f7346d8bc301 (patch)
tree49bedf2073e031a421c89644f62134bf9ee4f44b /arch/powerpc/cpu/mpc8xxx/ddr
parent22e0f5a9ecab85f36a0fe69892d950c1ac212c91 (diff)
parent9839709ea3df89f6021034508f48b97cab33ebb8 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: mpc85xx: support for Freescale COM Express P2020 arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning mpc85xx: support board-specific reset function powerpc/85xx: verify the localbus device tree address before booting the OS mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification powerpc/p3060qds: Add board related support for P3060QDS platform powerpc/85xx: clean up and document the QE/FMAN microcode macros powerpc/85xx: always implement the work-around for Erratum SATA_A001 powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h powerpc/85xx: Add workaround for erratum A-003474 powerpc/85xx: fixup flexcan device tree clock-frequency powerpc/85xx: Add workaround for erratum CPU-A003999
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c7
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/interactive.c3
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
index ffb503a777..d0a546610e 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
@@ -135,6 +135,7 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd,
switch (spd->module_type & DDR3_SPD_MODULETYPE_MASK) {
case DDR3_SPD_MODULETYPE_RDIMM:
case DDR3_SPD_MODULETYPE_MINI_RDIMM:
+ case DDR3_SPD_MODULETYPE_72B_SO_RDIMM:
/* Registered/buffered DIMMs */
pdimm->registered_dimm = 1;
for (i = 0; i < 16; i += 2) {
@@ -148,6 +149,12 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd,
case DDR3_SPD_MODULETYPE_SO_DIMM:
case DDR3_SPD_MODULETYPE_MICRO_DIMM:
case DDR3_SPD_MODULETYPE_MINI_UDIMM:
+ case DDR3_SPD_MODULETYPE_MINI_CDIMM:
+ case DDR3_SPD_MODULETYPE_72B_SO_UDIMM:
+ case DDR3_SPD_MODULETYPE_72B_SO_CDIMM:
+ case DDR3_SPD_MODULETYPE_LRDIMM:
+ case DDR3_SPD_MODULETYPE_16B_SO_DIMM:
+ case DDR3_SPD_MODULETYPE_32B_SO_DIMM:
/* Unbuffered DIMMs */
if (spd->mod_section.unbuffered.addr_mapping & 0x1)
pdimm->mirrored_dimm = 1;
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c b/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
index d7d66ef491..5b724371f6 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
@@ -1354,7 +1354,6 @@ unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo)
{
unsigned long long ddrsize;
const char *prompt = "FSL DDR>";
- unsigned int len;
char buffer[CONFIG_SYS_CBSIZE];
char *argv[CONFIG_SYS_MAXARGS + 1]; /* NULL terminated */
int argc;
@@ -1389,7 +1388,7 @@ unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo)
* No need to worry for buffer overflow here in
* this function; readline() maxes out at CFG_CBSIZE
*/
- len = readline_into_buffer(prompt, buffer);
+ readline_into_buffer(prompt, buffer);
argc = parse_line(buffer, argv);
if (argc == 0)
continue;