powerpc/corenet_ds: Master module for boot from SRIO

For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.

The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:

master:
	1. NOR flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image in master NOR flash.
	3. Normally boot from local NOR flash.
	4. Configure SRIO switch system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to SRIO1 or SRIO2 by RCW.
	3. RCW should configure the SerDes, SRIO interfaces correctly.
	4. Slave must be powered on after master's boot.

For the master module, need to finish these processes:
	1. Initialize the SRIO port and address space.
	2. Set inbound SRIO windows covered slave's u-boot image stored in
	   master's NOR flash.
	3. Master's u-boot image should be generated specifically by
	   make xxxx_SRIOBOOT_MASTER_config
	4. Master must boot first, and then slave can be powered on.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>

1 files changed, 51 insertions, 0 deletions

diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index e46d328067..77fa32f697 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -21,6 +21,10 @@
 #include <config.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
+#include <asm/fsl_srio.h>
+
+#define SRIO_PORT_ACCEPT_ALL 0x10000001
+#define SRIO_IB_ATMU_AR 0x80f55000
 
 #if defined(CONFIG_FSL_CORENET)
 	#define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
@@ -84,3 +88,50 @@ void srio_init(void)
 		setbits_be32(&gur->devdisr, _DEVDISR_RMU);
 	}
 }
+
+#ifdef CONFIG_SRIOBOOT_MASTER
+void srio_boot_master(void)
+{
+	struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
+
+	/* set port accept-all */
+	out_be32((void *)&srio->impl.port[CONFIG_SRIOBOOT_MASTER_PORT].ptaacr,
+				SRIO_PORT_ACCEPT_ALL);
+
+	debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
+			CONFIG_SRIOBOOT_MASTER_PORT);
+	/* configure inbound window5 for slave's u-boot image */
+	debug("SRIOBOOT - MASTER: Inbound window 5 for slave's image; "
+			"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
+	out_be32((void *)&srio->atmu
+			.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwtar,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
+	out_be32((void *)&srio->atmu
+			.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwbar,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
+	out_be32((void *)&srio->atmu
+			.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwar,
+			SRIO_IB_ATMU_AR
+			| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
+
+	/* configure inbound window4 for slave's u-boot image */
+	debug("SRIOBOOT - MASTER: Inbound window 4 for slave's image; "
+			"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
+	out_be32((void *)&srio->atmu
+			.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwtar,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
+	out_be32((void *)&srio->atmu
+			.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwbar,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
+	out_be32((void *)&srio->atmu
+			.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
+			SRIO_IB_ATMU_AR
+			| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
+}
+#endif