diff options
| author | Wolfgang Denk <wd@denx.de> | 2010-12-16 23:00:53 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-12-16 23:00:53 +0100 |
| commit | 006915fbb0e3c1c9927fe32c4e92cb011f8499e7 (patch) | |
| tree | b477df920f7d638a0472aa1d6bfa5ff71243448c /arch/powerpc/cpu | |
| parent | 98e69567022eb2138dd99554b3a2e80522a1b153 (diff) | |
| parent | b5d58d8500bfb918c7fec56f241e6ee1078c2be0 (diff) | |
Merge branch 'master' of ../master into next
Diffstat (limited to 'arch/powerpc/cpu')
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/pcie.c | 12 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/start.S | 8 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 |
3 files changed, 15 insertions, 7 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 1771c4823c..46a706d349 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -201,18 +201,18 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg) out_le32(&out_win->tarl, 0); out_le32(&out_win->tarh, 0); - for (i = 0; i < 2; i++, reg++) { + for (i = 0; i < 2; i++) { u32 ar; - if (reg->size == 0) + if (reg[i].size == 0) break; out_win = &pex->bridge.pex_outbound_win[i + 1]; - out_le32(&out_win->bar, reg->phys_start); - out_le32(&out_win->tarl, reg->bus_start); + out_le32(&out_win->bar, reg[i].phys_start); + out_le32(&out_win->tarl, reg[i].bus_start); out_le32(&out_win->tarh, 0); - ar = PEX_OWAR_EN | (reg->size & PEX_OWAR_SIZE); - if (reg->flags & PCI_REGION_IO) + ar = PEX_OWAR_EN | (reg[i].size & PEX_OWAR_SIZE); + if (reg[i].flags & PCI_REGION_IO) ar |= PEX_OWAR_TYPE_IO; else ar |= PEX_OWAR_TYPE_MEM; diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 515be4c871..460ac9aabb 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -1158,6 +1158,10 @@ map_flash_by_law1: bne 1b stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */ + /* Wait for HW to catch up */ + lwz r4, LBLAWAR1(r3) + twi 0,r4,0 + isync blr /* Though all the LBIU Local Access Windows and LBC Banks will be @@ -1196,5 +1200,9 @@ remap_flash_by_law0: xor r4, r4, r4 stw r4, LBLAWBAR1(r3) stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */ + /* Wait for HW to catch up */ + lwz r4, LBLAWAR1(r3) + twi 0,r4,0 + isync blr #endif /* CONFIG_SYS_FLASHBOOT */ diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 27236a0bad..4b8faa5daf 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -327,7 +327,7 @@ int cpu_init_r(void) if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { puts("already enabled"); l2srbar = l2cache->l2srbar0; -#ifdef CONFIG_SYS_INIT_L2_ADDR +#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE) if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE && l2srbar >= CONFIG_SYS_FLASH_BASE) { l2srbar = CONFIG_SYS_INIT_L2_ADDR; |