diff options
author | Takuma Ueba <ueba.takuma@jp.fujitsu.com> | 2018-04-23 13:27:33 +0900 |
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committer | York Sun <york.sun@nxp.com> | 2018-05-09 09:17:51 -0500 |
commit | 6a265aba302c924ae686042f5cf363904fe5bc24 (patch) | |
tree | 9f9f37d21cedda6f49f36cb99ea6e20379bbca60 /arch/powerpc/cpu | |
parent | 7d3a532d5dd90841ca747a98158b334f4eeb42ef (diff) |
powerpc: mpc85xx: Improve Work-around for Erratum A005125
Work-around for Erratum A005125 must be applied to all cores.
Signed-off-by: Yoshihisa Morizumi <yoshi.morizumi@jp.fujitsu.com>
Signed-off-by: Takuma Ueba <ueba.takuma@jp.fujitsu.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/release.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 5d212f35b5..d37e1ccf1e 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -26,6 +26,13 @@ .globl __secondary_start_page .align 12 __secondary_start_page: +#ifdef CONFIG_SYS_FSL_ERRATUM_A005125 + msync + isync + mfspr r3, SPRN_HDBCR0 + oris r3, r3, 0x0080 + mtspr SPRN_HDBCR0, r3 +#endif /* First do some preliminary setup */ lis r3, HID0_EMCP@h /* enable machine check */ #ifndef CONFIG_E500MC |