summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu
diff options
context:
space:
mode:
authorYork Sun <york.sun@nxp.com>2016-12-28 08:43:42 -0800
committerTom Rini <trini@konsulko.com>2017-01-04 19:40:44 -0500
commitc01e4a1a6f4ff8cbfa1fcdf984903e746cca3f66 (patch)
treeb3c958b568968e52d3a09e4fe77e143e40432ee4 /arch/powerpc/cpu
parentba1b6fb5cc86cb603c396d465cf5dac11ccab0b3 (diff)
mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig
Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13, SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig. Move existing macros to related Kconfig. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate bk4r1] Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r--arch/powerpc/cpu/mpc83xx/Kconfig3
-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig25
2 files changed, 28 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 6e4a93172f..184063c40b 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -22,6 +22,7 @@ config TARGET_VME8349
config TARGET_MPC8308RDB
bool "Support MPC8308RDB"
+ select SYS_FSL_ERRATUM_ESDHC111
config TARGET_MPC8313ERDB
bool "Support MPC8313ERDB"
@@ -69,9 +70,11 @@ config TARGET_TQM834X
config TARGET_HRCON
bool "Support hrcon"
+ select SYS_FSL_ERRATUM_ESDHC111
config TARGET_STRIDER
bool "Support strider"
+ select SYS_FSL_ERRATUM_ESDHC111
endchoice
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 307a45d6c4..0a4fa42b21 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -348,6 +348,7 @@ config ARCH_B4860
config ARCH_BSC9131
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -356,6 +357,7 @@ config ARCH_BSC9131
config ARCH_BSC9132
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -365,6 +367,7 @@ config ARCH_BSC9132
config ARCH_C29X
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -455,6 +458,7 @@ config ARCH_MPC8572
config ARCH_P1010
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -464,6 +468,7 @@ config ARCH_P1010
config ARCH_P1011
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -473,6 +478,7 @@ config ARCH_P1011
config ARCH_P1020
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -482,6 +488,7 @@ config ARCH_P1020
config ARCH_P1021
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -491,6 +498,7 @@ config ARCH_P1021
config ARCH_P1022
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -508,6 +516,7 @@ config ARCH_P1023
config ARCH_P1024
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -517,6 +526,7 @@ config ARCH_P1024
config ARCH_P1025
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -526,6 +536,8 @@ config ARCH_P1025
config ARCH_P2020
bool
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
+ select SYS_FSL_ERRATUM_ESDHC_A001
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -536,6 +548,7 @@ config ARCH_P2041
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -545,6 +558,7 @@ config ARCH_P3041
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -554,6 +568,9 @@ config ARCH_P4080
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
+ select SYS_FSL_ERRATUM_ESDHC13
+ select SYS_FSL_ERRATUM_ESDHC135
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -563,6 +580,7 @@ config ARCH_P5020
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -572,6 +590,7 @@ config ARCH_P5040
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -584,6 +603,7 @@ config ARCH_T1023
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC
@@ -594,6 +614,7 @@ config ARCH_T1024
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC
@@ -604,6 +625,7 @@ config ARCH_T1040
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC
@@ -614,6 +636,7 @@ config ARCH_T1042
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select SYS_FSL_HAS_SEC
@@ -624,6 +647,7 @@ config ARCH_T2080
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
@@ -633,6 +657,7 @@ config ARCH_T2081
bool
select E500MC
select FSL_LAW
+ select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE