powerpc: dts: QorIQ: Add node(s) for the platform PLL

Add the QorIQ clock control device nodes include files.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

2 files changed, 28 insertions, 0 deletions

diff --git a/arch/powerpc/dts/qoriq-clockgen1.dtsi b/arch/powerpc/dts/qoriq-clockgen1.dtsi
new file mode 100644
index 0000000000..dd4253d1d5
--- /dev/null
+++ b/arch/powerpc/dts/qoriq-clockgen1.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ clock control device tree stub [ controller @ offset 0xe1000 ]
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+clockgen: global-utilities@e1000 {
+	compatible = "fsl,qoriq-clockgen-1.0";
+	reg = <0xe1000 0x1000>;
+	#clock-cells = <2>;
+};
diff --git a/arch/powerpc/dts/qoriq-clockgen2.dtsi b/arch/powerpc/dts/qoriq-clockgen2.dtsi
new file mode 100644
index 0000000000..dec1e363b5
--- /dev/null
+++ b/arch/powerpc/dts/qoriq-clockgen2.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ clock control device tree stub [ controller @ offset 0xe1000 ]
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+clockgen: global-utilities@e1000 {
+	compatible = "fsl,qoriq-clockgen-2.0";
+	reg = <0xe1000 0x1000>;
+	#clock-cells = <2>;
+};