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author | Tom Rini <trini@ti.com> | 2012-09-25 12:23:55 -0700 |
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committer | Tom Rini <trini@ti.com> | 2012-09-25 12:23:55 -0700 |
commit | 5675b509165b67465a20e5cf71e07f40b449ef0c (patch) | |
tree | 9886f3e8fa8734ec9f8d9cb484fcaa87ff70203f /arch/powerpc/include/asm/fsl_ddr_dimm_params.h | |
parent | ee1f4caaa2a3f79d692155eec8a4c7289d60e106 (diff) | |
parent | d69dba367aed051663d0ee1ece013c8232bfa9f5 (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'arch/powerpc/include/asm/fsl_ddr_dimm_params.h')
-rw-r--r-- | arch/powerpc/include/asm/fsl_ddr_dimm_params.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h index 982b809462..ffe4db8b8a 100644 --- a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h +++ b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h @@ -43,6 +43,7 @@ typedef struct dimm_params_s { /* DIMM timing parameters */ unsigned int mtb_ps; /* medium timebase ps, only for ddr3 */ + unsigned int ftb_10th_ps; /* fine timebase, in 1/10 ps, only for ddr3 */ unsigned int tAA_ps; /* minimum CAS latency time, only for ddr3 */ unsigned int tFAW_ps; /* four active window delay, only for ddr3 */ |