diff options
| author | Andy Fleming <afleming@freescale.com> | 2012-10-08 07:44:18 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 14:31:22 -0500 |
| commit | f311838ded0c4b08726e5a363d518babc2109493 (patch) | |
| tree | 0b7489566b452a306808ab7f1a13a7224228d507 /arch/powerpc/include/asm/fsl_liodn.h | |
| parent | aa42cb71fa28a4f2c8b8cc0e691151f4ba19dbd9 (diff) | |
powerpc/mpc85xx: Add T4 device definitions
The T4 has added devices to previous corenet implementations:
* SEC has 3 more DECO units
* New PMAN device
* New DCE device
This doesn't add full support for the new devices. Just some
preliminary support.
Move PMAN LIODN to upper half of register
Despite having only one LIODN, the PMAN LIODN is stored in the
upper half of the register. Re-use the 2-LIODN code and just
set the LIODN as if the second one is 0. This results in the
actual LIODN being written to the upper half of the register.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/fsl_liodn.h')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_liodn.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index e591e67de6..d759de975e 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -123,6 +123,12 @@ extern void fdt_fixup_liodn(void *blob); CONFIG_SYS_FSL_CORENET_PME_OFFSET, \ CONFIG_SYS_FSL_CORENET_PME_OFFSET) +#define SET_PMAN_LIODN(num, liodn) \ + SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \ + offsetof(struct ccsr_pman, ppa1) + \ + CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \ + CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET) + /* -1 from portID due to how immap has the registers */ #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \ CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \ |