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| author | Stefano Babic <sbabic@denx.de> | 2014-01-26 12:11:54 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-01-26 12:11:54 +0100 |
| commit | 707acd01ded3c60a4e277f7c5432d397897b4dfd (patch) | |
| tree | 5730e1e1f0bac6c1aeddc261cb412fc3d5f220fd /arch/powerpc/include/asm/immap_85xx.h | |
| parent | be2a3bb39adf1fdd274fc427e30ef62eb86441a1 (diff) | |
| parent | c71b4dd2da0dcddabd7c29e6c3dc8a495d4bd928 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/powerpc/include/asm/immap_85xx.h')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 672e8c6650..68c3c82453 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1774,6 +1774,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S3_PLL2 0x00040000 #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL1 0x00020000 #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL2 0x00010000 +#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT 4 +#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_MASK 0x00000011 +#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK 1 #else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */ #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT 17 |