diff options
| author | Aneesh Bansal <aneesh.bansal@nxp.com> | 2016-01-22 17:05:59 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-02-24 08:40:55 -0800 |
| commit | f698e9f39aaf8ed30dab86f0130ea1e21bc721cc (patch) | |
| tree | 1f573060805e77db4ce8c9820204f4935e3a8b74 /arch/powerpc/include/asm/immap_85xx.h | |
| parent | 7f4736bd657afca7c224efb27cab496acd9ee021 (diff) | |
powerpc/SECURE_BOOT: Add PAMU driver
PAMU driver basic support for usage in Secure Boot.
In secure boot PAMU is not in bypass mode. Hence to use
any peripheral (SEC Job ring in our case), PAMU has to be
configured.
The patch reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3.
The Header file pamu.h and few functions in driver have been derived
from Freescale Libos.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/include/asm/immap_85xx.h')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index fd8aba42a5..53ca6d94d6 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1935,7 +1935,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) u8 res24[64]; u32 pblsr; /* Preboot loader status */ u32 pamubypenr; /* PAMU bypass enable */ -#define FSL_CORENET_PAMU_BYPASS 0xffff0000 u32 dmacr1; /* DMA control */ u8 res25[4]; u32 gensr1; /* General status */ @@ -2774,6 +2773,21 @@ typedef struct ccsr_pme { u8 res4[0x400]; } ccsr_pme_t; +struct ccsr_pamu { + u32 ppbah; + u32 ppbal; + u32 pplah; + u32 pplal; + u32 spbah; + u32 spbal; + u32 splah; + u32 splal; + u32 obah; + u32 obal; + u32 olah; + u32 olal; +}; + #ifdef CONFIG_SYS_FSL_RAID_ENGINE struct ccsr_raide { u8 res0[0x543]; @@ -2854,6 +2868,7 @@ struct ccsr_pman { #define CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET 0xED000 #define CONFIG_SYS_FSL_CPC_OFFSET 0x10000 #define CONFIG_SYS_FSL_SCFG_OFFSET 0xFC000 +#define CONFIG_SYS_FSL_PAMU_OFFSET 0x20000 #define CONFIG_SYS_MPC85xx_DMA1_OFFSET 0x100000 #define CONFIG_SYS_MPC85xx_DMA2_OFFSET 0x101000 #define CONFIG_SYS_MPC85xx_DMA3_OFFSET 0x102000 @@ -3067,6 +3082,8 @@ struct ccsr_pman { (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM2_OFFSET) #define CONFIG_SYS_FSL_SRIO_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SRIO_OFFSET) +#define CONFIG_SYS_PAMU_ADDR \ + (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_PAMU_OFFSET) #define CONFIG_SYS_PCI1_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCI1_OFFSET) |