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authorYork Sun <york.sun@nxp.com>2016-11-16 16:02:09 -0800
committerYork Sun <york.sun@nxp.com>2016-11-23 23:42:08 -0800
commit46d9fc0bb722cf8e676071017aef758755351f76 (patch)
tree63d52137e5476c54de3bd7330ca1254b6a6dfc0f /arch/powerpc/include/asm
parent2f8b81268a75dc4c5be55d6ca5a065d5065f45d9 (diff)
powerpc: P1014: Drop configuration for P1014
P1014 is a variant of P1010. There is no P1014 target configured. Drop related macros. P1014 SoC is still supported. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h17
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h4
2 files changed, 2 insertions, 19 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 5b6c872a08..31723eaa99 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -183,23 +183,6 @@
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A005125
-#elif defined(CONFIG_P1014)
-#define CONFIG_MAX_CPUS 1
-#define CONFIG_FSL_SDHC_V2_3
-#define CONFIG_SYS_FSL_NUM_LAWS 12
-#define CONFIG_SYS_PPC_E500_DEBUG_TLB 3
-#define CONFIG_TSECV2
-#define CONFIG_SYS_FSL_SEC_COMPAT 4
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_NUM_DDR_CONTROLLERS 1
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
-#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
-#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
-#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
-#define CONFIG_SYS_FSL_ERRATUM_A004508
-
/* P1017 is single core version of P1023 */
#elif defined(CONFIG_P1017)
#define CONFIG_MAX_CPUS 1
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index c82daab6ee..222bb4c949 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2222,7 +2222,7 @@ typedef struct ccsr_gur {
u32 gpindr; /* General-purpose input data */
u8 res5[12];
u32 pmuxcr; /* Alt. function signal multiplex control */
-#if defined(CONFIG_ARCH_P1010) || defined(CONFIG_P1014)
+#if defined(CONFIG_ARCH_P1010)
#define MPC85xx_PMUXCR_TSEC1_0_1588 0x40000000
#define MPC85xx_PMUXCR_TSEC1_0_RES 0xC0000000
#define MPC85xx_PMUXCR_TSEC1_1_1588_TRIG 0x10000000
@@ -2350,7 +2350,7 @@ typedef struct ccsr_gur {
#define MPC85xx_PMUXCR_SPI_GPIO 0x00000100
#endif
u32 pmuxcr2; /* Alt. function signal multiplex control 2 */
-#if defined(CONFIG_ARCH_P1010) || defined(CONFIG_P1014)
+#if defined(CONFIG_ARCH_P1010)
#define MPC85xx_PMUXCR2_UART_GPIO 0x40000000
#define MPC85xx_PMUXCR2_UART_TDM 0x80000000
#define MPC85xx_PMUXCR2_UART_RES 0xC0000000