diff options
| author | Sandeep Singh <sandeep@freescale.com> | 2014-06-05 18:49:57 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-06-05 13:45:07 -0700 |
| commit | 377ffcfabff39d2f812c28e54152cb53839ce338 (patch) | |
| tree | 1d986733cb4cf0d37ed4bc43bc861e6dd5c8a0ed /arch/powerpc/include | |
| parent | fa6e742825f1e1e00ac69c6829e75f14a1a51e9f (diff) | |
powerpc/mpc85xx: Add workaround to enable TDM on T1040
This is a workaround for 32 bit hardware limitation of TDM.
T1040 has 36 bit physical addressing, TDM DMAC register
are 32 bit wide but need to store address of CCSR space
which lies beyond 32 bit address range. This workaround
creats a LAW to enable access of TDM DMA to CCSR by
mapping CCSR to overlap with DDR.
A hole of 16M is created in memory using device tree. This
workaround law is set only if "tdm" is defined in hwconfig.
Also disable POST tests and add LIODN for TDM
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_law.h | 1 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_liodn.h | 4 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 4 |
3 files changed, 8 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index 37d3a22461..3b504875e0 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -68,6 +68,7 @@ enum law_trgt_if { LAW_TRGT_IF_DDR_INTLV_1234 = 0x16, LAW_TRGT_IF_BMAN = 0x18, LAW_TRGT_IF_DCSR = 0x1d, + LAW_TRGT_IF_CCSR = 0x1e, LAW_TRGT_IF_LBC = 0x1f, LAW_TRGT_IF_QMAN = 0x3c, diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index f658bcbc66..adfbb66e77 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -103,6 +103,10 @@ extern void fdt_fixup_liodn(void *blob); SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\ CONFIG_SYS_MPC85xx_QE_OFFSET) +#define SET_TDM_LIODN(liodn) \ + SET_GUTS_LIODN("fsl,tdm1.0", liodn, tdmliodnr,\ + CONFIG_SYS_MPC85xx_TDM_OFFSET) + #define SET_QMAN_LIODN(liodn) \ SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \ CONFIG_SYS_FSL_QMAN_OFFSET, \ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index fe1dcc27d6..8258ab3805 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1899,7 +1899,8 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) u32 sata2liodnr; /* SATA 2 LIODN */ u32 sata3liodnr; /* SATA 3 LIODN */ u32 sata4liodnr; /* SATA 4 LIODN */ - u8 res22[24]; + u8 res22[20]; + u32 tdmliodnr; /* TDM LIODN */ u32 qeliodnr; /* QE LIODN */ u8 res_57c[4]; u32 dma1liodnr; /* DMA 1 LIODN */ @@ -2915,6 +2916,7 @@ struct ccsr_sfp_regs { #define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000 +#define CONFIG_SYS_MPC85xx_TDM_OFFSET 0x185000 #define CONFIG_SYS_MPC85xx_QE_OFFSET 0x140000 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000 #if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\ |