diff options
| author | Becky Bruce <beckyb@kernel.crashing.org> | 2010-12-17 17:17:56 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-14 01:32:19 -0600 |
| commit | 38dba0c2ff685e3f8276a236bd70eaa09c84ead5 (patch) | |
| tree | fc3365f6bdd25dfe23f2ec8c02926907613c8520 /arch/powerpc/include | |
| parent | 6b1ef2a6a553c33e74c5e50c77b55d40af669be3 (diff) | |
mpc85xx boards: initdram() cleanup/bugfix
Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts. Most
of the initdram() functions were identical, with 2 common differences:
1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others. I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.
2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document. It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled. This seems bad.
The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_ddr_sdram.h | 13 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_lbc.h | 4 |
2 files changed, 17 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h index 17d4b319bc..8ceae18457 100644 --- a/arch/powerpc/include/asm/fsl_ddr_sdram.h +++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h @@ -214,6 +214,19 @@ typedef struct memctl_options_s { extern phys_size_t fsl_ddr_sdram(void); +/* + * The 85xx boards have a common prototype for fixed_sdram so put the + * declaration here. + */ +#ifdef CONFIG_MPC85xx +extern phys_size_t fixed_sdram(void); +#endif + +#if defined(CONFIG_DDR_ECC) +extern void ddr_enable_ecc(unsigned int dram_size); +#endif + + typedef struct fixed_ddr_parm{ int min_freq; int max_freq; diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 82d24ab13f..fcf3371f59 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -16,6 +16,10 @@ #include <config.h> #include <common.h> +#ifdef CONFIG_MPC85xx +void sdram_init(void); +#endif + /* BR - Base Registers */ #define BR0 0x5000 /* Register offset to immr */ |