diff options
| author | York Sun <yorksun@freescale.com> | 2013-06-25 11:37:49 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-08-09 12:41:40 -0700 |
| commit | d217a9ad01ee6557a0c47cfc745eef6890507bbb (patch) | |
| tree | 7905c863e594930b7115b2e6d78a821f6205c79a /arch/powerpc/include | |
| parent | c63e137014cf148bc1d234128941dccee3d519ae (diff) | |
powerpc/mpc85xx: Workaround for A-005812
Erratum A-005812 Incorrect reservation clearing in Write Shadow mode can
result in invalid atomic operations. For u-boot, this erratum only impacts
SoCs running in write shadow mode.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index c3a37600d3..91fda7ea41 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -368,6 +368,7 @@ #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 #define CONFIG_SYS_FSL_ERRATUM_A004849 +#define CONFIG_SYS_FSL_ERRATUM_A005812 #elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ #define CONFIG_SYS_FSL_QORIQ_CHASSIS1 @@ -413,6 +414,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004849 #define CONFIG_SYS_FSL_ERRATUM_A004580 #define CONFIG_SYS_P4080_ERRATUM_PCIE_A003 +#define CONFIG_SYS_FSL_ERRATUM_A005812 #elif defined(CONFIG_PPC_P5020) /* also supports P5010 */ #define CONFIG_SYS_PPC64 /* 64-bit core */ @@ -474,6 +476,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004510 #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 +#define CONFIG_SYS_FSL_ERRATUM_A005812 #elif defined(CONFIG_BSC9131) #define CONFIG_MAX_CPUS 1 |