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authorAlex Porosanu <alexandru.porosanu@freescale.com>2016-04-29 15:18:00 +0300
committerYork Sun <york.sun@nxp.com>2016-05-18 08:51:46 -0700
commit76394c9c9139b82e21a6e52da0e7341a3374f4be (patch)
tree3b4bc18b9b9d5424f2d556b2c4b17008386c2b0c /arch/powerpc
parent404bf4547ecb4c1409ae0936444fe02ba978e510 (diff)
crypto/fsl: add support for multiple SEC engines initialization
For SoCs that contain multiple SEC engines, each of them needs to be initialized (by means of initializing among others the random number generator). Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index f168375b45..61f5639e0d 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -958,6 +958,15 @@ int cpu_init_r(void)
#ifdef CONFIG_FSL_CAAM
sec_init();
+
+#if defined(CONFIG_PPC_C29X)
+ if ((SVR_SOC_VER(svr) == SVR_C292) ||
+ (SVR_SOC_VER(svr) == SVR_C293))
+ sec_init_idx(1);
+
+ if (SVR_SOC_VER(svr) == SVR_C293)
+ sec_init_idx(2);
+#endif
#endif
#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)