diff options
| author | Ken Ma <make@marvell.com> | 2018-03-26 15:56:03 +0800 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2018-03-30 12:52:48 +0200 |
| commit | dc36235abe408cf450daa7b06d612084119dd841 (patch) | |
| tree | 47856f60b81dc847e560f54982c5efb97084e01f /arch/riscv/Kconfig | |
| parent | 0237448a715468f910d2b30c548c171380f901c1 (diff) | |
arm64: a37xx: pinctrl: Correct mpp definitions
This patch corrects below mpp definitions:
- The sdio_sb group is composed of 6 pins and not 5;
- The rgmii group contains pins mpp2[17:6] and not mpp2[19:6];
- Pin of group "pmic0" is mpp1[6] but not mpp1[16];
- Pin of group "pmic1" is mpp1[7] but not mpp1[17];
- A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its
bitmask is bit4;
- Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is
bit5 | bit9 | bit10 but not bit4;
- Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to
bit11 | bit12 | bit13.
Reviewed-on: http://vgitil04.il.marvell.com:8080/43288
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/riscv/Kconfig')
0 files changed, 0 insertions, 0 deletions