diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2018-12-12 06:12:41 -0800 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2018-12-18 09:56:27 +0800 |
| commit | 4b3f5ed5ac1a4376c29c3010d25049c03de4ed57 (patch) | |
| tree | c515114e3d19c0d4a1964c2c4b4d54744445164a /arch/riscv/cpu/Makefile | |
| parent | 485e822346caa982a5c17b7b136b17e8d09dafee (diff) | |
riscv: Move trap handler codes to mtrap.S
Currently the M-mode trap handler codes are in start.S. For future
extension, move them to a separate file mtrap.S.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/cpu/Makefile')
| -rw-r--r-- | arch/riscv/cpu/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/cpu/Makefile b/arch/riscv/cpu/Makefile index 2cc6757fcf..6bf6f911c6 100644 --- a/arch/riscv/cpu/Makefile +++ b/arch/riscv/cpu/Makefile @@ -4,4 +4,4 @@ extra-y = start.o -obj-y += cpu.o +obj-y += cpu.o mtrap.o |