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authorLukas Auer <lukas.auer@aisec.fraunhofer.de>2019-08-21 21:14:43 +0200
committerAndes <uboot@andestech.com>2019-08-26 16:07:42 +0800
commitfbfd92bf9bdc39d6537806ab58a83a48e5a2c004 (patch)
tree8b4018a4e88bc57278bbc2d01b2cb3b137d55c88 /arch/riscv/cpu/generic
parentb83edfbde9a845d47a2766f4677deb336abfa42a (diff)
riscv: add run mode configuration for SPL
U-Boot SPL can be run in a different privilege mode from U-Boot proper. Add new configuration entries for SPL to allow the run mode to be configured independently of U-Boot proper. Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE configuration symbols to also cover the SPL equivalents. Ensure that files compatible with only one privilege mode are not included in builds targeting an incompatible privilege mode. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'arch/riscv/cpu/generic')
-rw-r--r--arch/riscv/cpu/generic/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig
index 1d6ab5032d..b7552f539f 100644
--- a/arch/riscv/cpu/generic/Kconfig
+++ b/arch/riscv/cpu/generic/Kconfig
@@ -8,5 +8,5 @@ config GENERIC_RISCV
imply CPU
imply CPU_RISCV
imply RISCV_TIMER
- imply SIFIVE_CLINT if RISCV_MMODE
+ imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE)
imply CMD_CPU