diff options
| author | Tom Rini <trini@konsulko.com> | 2020-06-04 13:50:39 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-06-04 13:50:39 -0400 |
| commit | 07d90d8bd451b9595fb0369c51f90ee2dccd5d9f (patch) | |
| tree | 97560956a7738893dd4cc972e3a1b463623033bb /arch/riscv/dts/hifive-unleashed-a00.dts | |
| parent | c27178ba3649f539c9f1890ea147f4c5415f63b5 (diff) | |
| parent | 0a94007e829876c7ebd49daebfaa90eea25801b8 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to
SBI_v01") Move sbi_probe_extension() out of CONFIG_SBI_V01.
- SiFive FU540 support SPL.
Diffstat (limited to 'arch/riscv/dts/hifive-unleashed-a00.dts')
| -rw-r--r-- | arch/riscv/dts/hifive-unleashed-a00.dts | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/dts/hifive-unleashed-a00.dts b/arch/riscv/dts/hifive-unleashed-a00.dts index 88cfcb96bf..4a2729f5ca 100644 --- a/arch/riscv/dts/hifive-unleashed-a00.dts +++ b/arch/riscv/dts/hifive-unleashed-a00.dts @@ -2,6 +2,7 @@ /* Copyright (c) 2018-2019 SiFive, Inc */ #include "fu540-c000.dtsi" +#include <dt-bindings/gpio/gpio.h> /* Clock frequency (in Hz) of the PCB crystal for rtcclk */ #define RTCCLK_FREQ 1000000 @@ -41,6 +42,10 @@ clock-frequency = <RTCCLK_FREQ>; clock-output-names = "rtcclk"; }; + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + }; }; &uart0 { @@ -94,3 +99,7 @@ &pwm1 { status = "okay"; }; + +&gpio { + status = "okay"; +}; |