summaryrefslogtreecommitdiff
path: root/arch/riscv/dts
diff options
context:
space:
mode:
authorBin Meng <bin.meng@windriver.com>2020-07-19 23:06:34 -0700
committerAndes <uboot@andestech.com>2020-07-24 14:56:29 +0800
commit142dd57c5d971d3291e8896b5ecd7e878f97e1f1 (patch)
tree2cb93b78d04c758ab7a68850a93d1f54e1504efc /arch/riscv/dts
parente8fa43182a487e7542c49408eb2499cc4c0ed53c (diff)
riscv: dts: hifive-unleashed-a00: Make memory node available to SPL
Make memory node available to SPL in prepration to updates to SiFive DDR RAM driver to read memory information from DT. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Diffstat (limited to 'arch/riscv/dts')
-rw-r--r--arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
index 7d838bf9de..5d0c928b29 100644
--- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
@@ -20,6 +20,10 @@
u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */
};
+ memory@80000000 {
+ u-boot,dm-spl;
+ };
+
hfclk {
u-boot,dm-spl;
};