diff options
| author | Tom Rini <trini@konsulko.com> | 2020-06-04 13:50:39 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-06-04 13:50:39 -0400 |
| commit | 07d90d8bd451b9595fb0369c51f90ee2dccd5d9f (patch) | |
| tree | 97560956a7738893dd4cc972e3a1b463623033bb /arch/riscv/include/asm/arch-fu540/gpio.h | |
| parent | c27178ba3649f539c9f1890ea147f4c5415f63b5 (diff) | |
| parent | 0a94007e829876c7ebd49daebfaa90eea25801b8 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fixes 7e249bc13aaf: ("riscv: Move all SMP related SBI calls to
SBI_v01") Move sbi_probe_extension() out of CONFIG_SBI_V01.
- SiFive FU540 support SPL.
Diffstat (limited to 'arch/riscv/include/asm/arch-fu540/gpio.h')
| -rw-r--r-- | arch/riscv/include/asm/arch-fu540/gpio.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/arch-fu540/gpio.h b/arch/riscv/include/asm/arch-fu540/gpio.h new file mode 100644 index 0000000000..0d16c59ca6 --- /dev/null +++ b/arch/riscv/include/asm/arch-fu540/gpio.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 SiFive, Inc. + */ + +#ifndef _GPIO_SIFIVE_H +#define _GPIO_SIFIVE_H + +#define GPIO_INPUT_VAL 0x00 +#define GPIO_INPUT_EN 0x04 +#define GPIO_OUTPUT_EN 0x08 +#define GPIO_OUTPUT_VAL 0x0C +#define GPIO_RISE_IE 0x18 +#define GPIO_RISE_IP 0x1C +#define GPIO_FALL_IE 0x20 +#define GPIO_FALL_IP 0x24 +#define GPIO_HIGH_IE 0x28 +#define GPIO_HIGH_IP 0x2C +#define GPIO_LOW_IE 0x30 +#define GPIO_LOW_IP 0x34 +#define GPIO_OUTPUT_XOR 0x40 + +#define NR_GPIOS 16 + +enum gpio_state { + LOW, + HIGH +}; + +/* Details about a GPIO bank */ +struct sifive_gpio_platdata { + void *base; /* address of registers in physical memory */ +}; + +#define SIFIVE_GENERIC_GPIO_NR(port, index) \ + (((port) * NR_GPIOS) + ((index) & (NR_GPIOS - 1))) + +#endif /* _GPIO_SIFIVE_H */ |