diff options
| author | Rick Chen <rick@andestech.com> | 2017-12-26 13:55:51 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-12 08:05:12 -0500 |
| commit | 6020faf62c3bfb8677378d6c31e50f103bc06114 (patch) | |
| tree | 44132873ef4f0f3bf1c62c53b1323c960839f497 /arch/riscv/include/asm/u-boot-riscv.h | |
| parent | 039ed7c57245b139986bc78e9f951e55c2039c47 (diff) | |
riscv: nx25: include: Add header files to support RISC-V
Add header files for RISC-V.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Diffstat (limited to 'arch/riscv/include/asm/u-boot-riscv.h')
| -rw-r--r-- | arch/riscv/include/asm/u-boot-riscv.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/u-boot-riscv.h b/arch/riscv/include/asm/u-boot-riscv.h new file mode 100644 index 0000000000..18099cd260 --- /dev/null +++ b/arch/riscv/include/asm/u-boot-riscv.h @@ -0,0 +1,21 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick@andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _U_BOOT_RISCV_H_ +#define _U_BOOT_RISCV_H_ 1 + +/* cpu/.../cpu.c */ +int cleanup_before_linux(void); + +/* board/.../... */ +int board_init(void); + +#endif /* _U_BOOT_RISCV_H_ */ |