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authorTom Rini <trini@konsulko.com>2020-04-23 08:24:47 -0400
committerTom Rini <trini@konsulko.com>2020-04-23 08:24:47 -0400
commita5f9b8a8b592400a01771ad2dac76cba69c914f3 (patch)
tree23e1c8542fd35083260a97efb0d92b3485889aa1 /arch/riscv/include/asm
parentcaad316b3165615f1a4848901811a4a084444c9d (diff)
parent177c53fe6c64d8656f5a647116a97047202c5455 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Adds few DT related fixes required for Linux EFI stub to work on RISC-V. - Makes SBI v0.2 the default SBI version to work with OpenSBI v0.7. - Revert "riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL" - Remove unnecessary CONFIG_IS_ENABLED().
Diffstat (limited to 'arch/riscv/include/asm')
-rw-r--r--arch/riscv/include/asm/global_data.h3
-rw-r--r--arch/riscv/include/asm/u-boot-riscv.h2
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h
index b74bd7e738..6c50149218 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -15,6 +15,7 @@
/* Architecture-specific global data */
struct arch_global_data {
long boot_hart; /* boot hart id */
+ phys_addr_t firmware_fdt_addr;
#ifdef CONFIG_SIFIVE_CLINT
void __iomem *clint; /* clint base address */
#endif
@@ -24,7 +25,7 @@ struct arch_global_data {
#ifdef CONFIG_ANDES_PLMT
void __iomem *plmt; /* plmt base address */
#endif
-#ifdef CONFIG_SMP
+#if CONFIG_IS_ENABLED(SMP)
struct ipi_data ipi[CONFIG_NR_CPUS];
#endif
#ifndef CONFIG_XIP
diff --git a/arch/riscv/include/asm/u-boot-riscv.h b/arch/riscv/include/asm/u-boot-riscv.h
index 49febd5881..543a1688db 100644
--- a/arch/riscv/include/asm/u-boot-riscv.h
+++ b/arch/riscv/include/asm/u-boot-riscv.h
@@ -17,5 +17,7 @@ int cleanup_before_linux(void);
/* board/.../... */
int board_init(void);
void board_quiesce_devices(void);
+int riscv_board_reserved_mem_fixup(void *fdt);
+int riscv_fdt_copy_resv_mem_node(const void *src_fdt, void *dest_fdt);
#endif /* _U_BOOT_RISCV_H_ */